SeniorDigitalDesignEngineer

Cambridge, UK | Full-time | Permanent | Hybrid Salary: £70,000 to £90,000 DOE + Bonus + Benefits The salary range for this role is broad, as we are able to consider varying levels of experience. Any offer made will carefully take into account level of experience (including relevant industry experience), transferable relevant skills and previous relevant achievements. We will also consider part-time applications for this role. Please indicate your preferred working schedule in your cover letter. About us Riverlane’s mission is to master quantum error correction (QEC) and unlock a new age of human progress. From advances in material and climate science, to complex chemistry simulation for new drug design, quantum computers will help humanity solve some of its most important challenges. But without QEC, the industry’s defining technical challenge, such breakthroughs can never be achieved. Riverlane is the world leader in QEC technology. QEC is a complex problem that requires a range of skills, talent and passion. Having raised more than $125M in funding to date to accelerate our cutting-edge R Architecture of System on Chip solutions, with at least one CPU and custom accelerators; Large-scale, complex systems on FPGA/ASIC Proven capability to test, debug and improve complex systems  Ability to convert product requirements into technical specifications to document and share your work  A curious nature and a passion for learning and continuous improvement  Excellent communication skills, with the ability to work both independently and collaboratively as part of a team  Even better if you have... Experience with ASIC environments (<48nm) What can you expect from us A comprehensive benefits package that includes an annual bonus plan, private medical insurance, life insurance, and a contributory pension scheme Equity, so that our team can share in the long-term success of Riverlane 28 days annual leave, plus bank holidays and enhanced family leave A diverse work environment