NVIDIA
Technology
SeniorDFTEngineer
Neural analysis suggests this role is
optimal for Senior candidates.
“Senior DFT Engineer at NVIDIA. Skills: Design for Test (DFT), Test Engineering, ATE Test Program Development, DFT EDA Tools, Python. responsible for all aspects of testing including methodology, logic insertion, verification, test pattern generation, test program bring-up, and complex debug/FA to resolve any issues. Finding the right tradeoffs between test time and the ability to collect necessary data to monitor the health of next generation process nodes”
What You'll Achieve.
optimize design tradeoffs and methodology on next generation CMOS technology; monitor the health of next generation process nodes; resolve any issues
Industry & Context.
problem solver; optimize design tradeoffs; resolve any issues; Finding the right tradeoffs; finding the root cause of product bring-up testing issues
What They're Looking For.
Must Have
BS in Electrical or Computer Engineering or equivalent experience, 12+ years experience in design for test, In-depth knowledge of various test architectures including IEEE1149. 1, IEEE1500, SSN scan compression, IOBIST, and memory BIST, Expertise in test logic design verification and pattern generation, Experience in doing ATE test program development and bring-up including spec'ing custom test methods needed for data collection, Hands-on knowledge of industry standard DFT EDA tools, Proficiency in programming and scripting languages, such as Python
Nice to Have
Experience with DDR and HBM high speed I/O testing, Hands on experience with failure analysis equipment like LVP, photon emission, and ebeam probing, Proficiency with Advantest 93k testers
What You'll Do.
responsible for all aspects of testing including methodology
test pattern generation
test program bring-up
and complex debug/FA to resolve any issues
Finding the right tradeoffs between test time and the ability to collect necessary data to monitor the health of next generation process nodes
design and tapeout advanced packaging vehicles
Assist with finding the root cause of product bring-up testing issues
How You'll Work.
Team & Collaboration
Work as part of the advanced technology team to optimize design tradeoffs and methodology; Work as part of the team to design and tapeout advanced packaging vehicles; highly motivated individual searching for a collaborative and exciting role
Full Job Description
Come be a part of new process technology adoption by joining NVIDIA's Advanced Technology Group! Work as part of the advanced technology team to optimize design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior DFT Engineer to join our dynamic and growing team! If you are problem solver and highly motivated individual searching for a collaborative and exciting role, join us today. We encourage applicants with a history of proven success working in a multicultural and diverse environment. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities which are hard to solve, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human inventiveness and intelligence. **What you 'll be doing:** * You will be responsible for all aspects of testing including methodology, logic insertion, verification, test pattern generation, test program bring-up, and complex debug/FA to resolve any issues. * Finding the right tradeoffs between test time and the ability to collect necessary data to monitor the health of next generation process nodes. * Work as part of the team to design and tapeout advanced packaging vehicles. * Assist with finding the root cause of product bring-up testing issues **What we need to see:** * Hold a BS in Electrical or Computer Engineering or equivalent experience. * 12+ years experience in design for test. * In-depth knowledge of various test architectures including IEEE1149.1, IEEE1500, SSN scan compression, IOBIST, and memory BIST. * Expertise in test logic design verification and pattern generation. This includes developing new flows and enhancing existing flows. *
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