NVIDIA
Technology
SeniorDesign-for-TestEngineer,ATPG
Neural analysis suggests this role is
optimal for Senior candidates.
“Senior Design-for-Test Engineer, ATPG at NVIDIA. Skills: Design-for-Test, ATPG, ASIC Design. Manage state of the art Design for Test/ATPG. Implement state of the art Design for Test/ATPG”
Industry & Context.
Diagnosis
What They're Looking For.
Must Have
5+ years DFT/ATPG experience, BSc. in Electrical Engineering or Computer engineering
Nice to Have
Knowledge of DFT including scan, BIST, on-chip scan compression, fault models, ATPG, and fault simulation, Experience in Mentor TestKompress ATPG tool and retargeting flow, Programming languages: TCL, PRL, Phyton & Unix shell scripts, Experience with ATE and Silicon bring-up
What You'll Do.
Manage state of the art Design for Test/ATPG
Implement state of the art Design for Test/ATPG
Take ATPG ownership end to end
Plan ATPG architecture
Generate ATPG patterns
Perform post Silicon bring up
Diagnose post Silicon issues
Invent automation flows
Maintain automation flows
Provide short test time to production
How You'll Work.
Team & Collaboration
Working with chip design; Working with backend; Working with verification; Working with production testing
Full Job Description
Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Engineering team at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing. Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements! **What you’ll be doing:** * You will be in charge of state of the art Design for Test/ATPG flows and implementation * Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis. * Inventing and maintaining automation flows that provide the short test time to production **What we need to see:** * 5+ years of hands on DFT/ATPG experience knowledge & technical experience in DFT ASIC Design and in ATPG tools * Strong programming skills in scripting languages * BSc. in Electrical Engineering or Computer engineering * Quick learner, proactive and self-motivated, eager to learn and contribute, sense or ownership, commitment, and responsibility **Ways to stand out from the crowd:** * Knowledge of DFT including scan, BIST, on-chip scan compression, fault models, ATPG, and fault simul
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