NVIDIA
SeniorASICDesignEngineer
Neural analysis suggests this role is
optimal for Senior candidates.
“Senior ASIC Design Engineer at NVIDIA. Skills: ASIC Design, RTL, Micro-architecture. Micro-architect features. Deliver verified build”
What You'll Achieve.
Meet area requirements; Meet performance requirements; Meet power requirements
Industry & Context.
Debugging; Analytical skills
What They're Looking For.
Must Have
Bachelor's or Master's Degree in EE or CE, 8+ years build/RTL experience, Highly proficient in logic design, Verilog and/or System-Verilog, Solid understanding of Computer Architecture, Solid understanding of Digital Systems build, Deep understanding of ASIC flow, Interpersonal and communication skills, Prior experience building arbiters, Prior experience building scheduling, Prior experience building synchronization, Prior experience building bus protocols, Prior experience building interconnect networks, Prior experience building switches, Familiarity with architecture concepts, Familiarity with implementation of arbitration policies, Familiarity with interconnection routing policies, Familiarity with deadlock avoidance, Familiarity with virtual channels, Good debugging and analytical skills
Nice to Have
Experience building arbiters, Experience building scheduling, Experience building synchronization, Experience building bus protocols, Experience building interconnect networks, Experience building switches, Familiarity with architecture concepts, Familiarity with implementation of arbitration policies, Familiarity with interconnection routing policies, Familiarity with deadlock avoidance, Familiarity with virtual channels
What You'll Do.
Micro-architect features
Deliver verified build
Deliver synthesis/timing clean build
Collaborate with architects
Collaborate with verification engineers
Collaborate with software engineers
Collaborate with physical build engineers
How You'll Work.
Team & Collaboration
Across teams
Communication Scope
Interpersonal skills
Full Job Description
NVIDIA is looking for an outstanding Senior ASIC Design Engineer to build and implement leading SoCs and GPUs. This role offers a chance to create real impact in a dynamic, tech-driven company. The products range from consumer graphics to self-driving cars and the fast-growing field of artificial intelligence. Our team consists of outstanding people worldwide, working to push the boundaries of what is possible today and define the future of computing. **What you’ll be doing:** * As a key member of our design team, you will be responsible for the micro-architecture and build implementation of NOC/interconnect Xbar. * Micro-architect features to meet area, performance, and power requirements. * Deliver a fully verified build by working closely with verification engineers. * Deliver a synthesis/timing clean build to ensure a routable and physically implementable design. * Collaborate with architects, verification engineers, software engineers, and physical build engineers to accomplish your goals. **What we need to see:** * Bachelor's or Master’s Degree in Electrical Engineering or Computer Engineering, or equivalent experience. * 8+ years of build/RTL experience working on complex units in xbar/memory system. * Highly proficient in logic design, Verilog and/or System-Verilog, with a solid understanding of Computer Architecture and Digital Systems build. * A deep understanding of ASIC flow including RTL, verification, logic synthesis, timing analysis, ECO, and post silicon debug. * Strong interpersonal and communication skills to collaborate across teams. * Prior experience building arbiters, scheduling, synchronization, bus protocols, interconnect networks and/or switches. * Familiarity with architecture concepts and implementation of arbitration policies, interconnection routing policies/deadlock avoidance, and virtual channels. * Good debugging and analytical skills. Your base salary will be determined based on your location, experience, and the pay of employees in
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