Renesas Electronics

Semiconductor

SeniorAnalogEngineer(f/m/d)

£75–110k ~AI est. Edinburgh, United Kingdom FULL TIME
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for mid candidates.

The Brief

“Senior Analog Engineer (f/m/d) at Renesas Electronics. Skills: Analog circuit design, ASIC design, Chip verification. Design and verify CMOS analog blocks. Meet performance, area, power and timescale constraints”

Industry & Context.

Semiconductor
Problems you'll solve

Make good judgement

Eligibility Requirements

Occasional international travel

What They're Looking For.

Must Have

Degree level qualification in Electronics/Microelectronics Engineering or a related discipline, 5-8 years of relevant analog circuit design experience, Hands-on experience in the design and verification of blocks such as amplifiers, oscillators, LDOs, comparators and referenceiasing circuits, Experience of sub-system and chip-level verification including AMS verification, Competence with EDA design tools, Ability to work with minimal instruction, Ability to make good judgement, Ability to propose innovative solutions, Ability to make significant contributions, Ability to support and mentor less experienced team members, Cross cultural awareness and sensitivity, Results-oriented and able to deliver on-time under tight schedule, Ability to work both independently and part of a team, Excellent command of verbal and written English, Concise and precise communication and presentation skills

Nice to Have

Expertise in the design of filters and PLLs, Expertise in the design of RF circuits such as LNAs and mixers, Flexibility to undertake occasional international travel

What You'll Do.

Design and verify CMOS analog blocks

power and timescale constraints

Take technical leadership for sub-systems

Drive sub-systems from specification to production ramp

Collaborate with project leads

Achieve system and design strategy

Ensure quality of layout

Produce high quality documentation

Work closely with DFT engineers

Ensure alignment to DFT strategy

Drive silicon debugging

Drive design characterization

Support and participate in lab evaluation

Work with test and product engineers

Support test development

Support ramp to production

Coach and mentor less experienced team members

Take a proactive approach to driving own development

Utilize team members and internal development opportunities

How You'll Work.

Team & Collaboration

Collaborate with project leads; Guide layout team; Work closely with DFT engineers; Work with test and product engineers; Utilize team members

Communication Scope

Technical documentation; Presentation skills

Process & Methodology

Technical leadership

Full Job Description

* Design and verify CMOS analog blocks for custom ASICs to meet performance, area, power and timescale constraints. Blocks include amplifiers, oscillators, LDOs, comparators and reference/biasing circuits. * Take technical leadership for sub-systems and drive them from specification to production ramp. * Collaborate with project leads to achieve system and design strategy for custom ASICs. * Guide layout team to ensure quality of layout of own designs. * Produce high quality documentation for designed circuits. * Work closely with DFT engineers to ensure alignment to DFT strategy and implementation. * Drive silicon debugging and design characterization. * Support and participate in lab evaluation for own designs. * Work with test and product engineers to support test development and ramp to production. * Coach and mentor less experienced team members. * Take a proactive approach to driving own development plan, utilizing team members and internal development opportunities. ## Qualifications * Degree level qualification in Electronics/Microelectronics Engineering or a related discipline is required * 5-8 years of relevant analog circuit design experience. * Hands-on experience in the design and verification of blocks such as amplifiers, oscillators, LDOs, comparators and reference/biasing circuits. * Expertise in the design of filters and PLLs and/or RF circuits such as LNAs and mixers is an advantage. * Experience of sub-system and chip-level verification including AMS verification. * Strong competence with EDA design tools and the Cadence design environment. * Ability to work with minimal instruction – either independently or collaboratively. * Ability to make good judgement in selecting methods and techniques for obtaining solutions. * Able to confidently share own expertise and work with others. * Ability to propose innovative solutions. * Ability to make significant contributions to projects, programs and business initiatives with creativity and ingenuity. * Abi

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