Nxp
PrincipalSOCVerificationEngineer
Neural analysis suggests this role is
optimal for Lead candidates.
“Principal SOC Verification Engineer at Nxp. Skills: SystemVerilog/UVM, AMBA protocols, ARM cores verification, ISO 26262. Drive end‑to‑end verification. Own verification sign‑off”
What You'll Achieve.
proactively identify and mitigate verification risks toward tape‑out readiness
What They're Looking For.
Must Have
10 + years of hands‑on experience driving end‑to‑end verification for ARM‑based automotive MCUs, expertise in SystemVerilog/UVM‑based environments, full‑chip integration, verification sign‑off ownership, deep knowledge of standard AMBA protocols (AXI/AHB/APB), verification of ARM Cortex‑R52 and Cortex‑M7/M4 cores, ARM NIC/XBAR interconnect verification, connectivity, coherency, performance, and deadlock scenarios, verifying complex subsystem interactions such as boot, reset, clocking, and low‑power behavior, verifying MRAM‑based subsystems, safety mechanisms, firmware‑driven flows compliant with ISO 26262 automotive safety requirements, solid understanding of power intent specification and low‑power verification using UPF, covering multiple power domains, isolation, retention, and power state transitions
Nice to Have
Pre‑silicon experience on emulation or validation platforms (such as Palladium, Veloce, or equivalent)
What You'll Do.
Drive end‑to‑end verification
Own verification sign‑off
Verify subsystem interactions
Verify MRAM subsystems
Verify safety mechanisms
Lead complex debug efforts
How You'll Work.
Team & Collaboration
collaborate closely with design, safety, and validation stakeholders
Full Job Description
The Principal SoC Verification Engineer is expected to have **10 + years of hands‑on experience** driving end‑to‑end verification for ARM‑based automotive MCUs, with strong expertise in SystemVerilog/UVM‑based environments, full‑chip integration, and verification sign‑off ownership. The role requires deep knowledge of standard **AMBA protocols (AXI/AHB/APB)** , verification of **ARM Cortex‑R52 and Cortex‑M7/M4 cores** , and **ARM NIC/XBAR interconnect verification** , including connectivity, coherency, performance, and deadlock scenarios. The candidate must demonstrate strong capability in verifying complex subsystem interactions such as boot, reset, clocking, and low‑power behavior. Proven experience in verifying **MRAM‑based subsystems** , safety mechanisms, and firmware‑driven flows compliant with **ISO 26262** automotive safety requirements is mandatory. A solid understanding of power intent specification and low‑power verification using **UPF** , covering multiple power domains, isolation, retention, and power state transitions, is required. **Pre‑silicon experience on emulation or validation platforms** (such as Palladium, Veloce, or equivalent) will be considered a strong add‑on. The engineer is also expected to lead complex debug efforts, mentor teams, and collaborate closely with design, safety, and validation stakeholders to proactively identify and mitigate verification risks toward tape‑out readiness. Work Experience and Qualification- At least 10+ years of experience with B. Tech/ M. Tech in electronics and electrical. **#LI-onsite** [More information about NXP in India...](https://www.nxp.com/company/about-nxp/worldwide-locations/india:INDIA) #LI-2734
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