Micron Technology
Semiconductor
PrincipalMemoryDesignEngineer,HBM
Neural analysis suggests this role is
optimal for Principal candidates.
“Principal Memory Design Engineer, HBM at Micron Technology. Skills: HBM, DRAM design, Circuit optimization. Design DRAM circuits. Optimize DRAM circuits”
What You'll Achieve.
Deliver scalable solutions; Deliver manufacturable solutions; Influence performance; Influence power; Influence reliability; Influence time-to-market
Industry & Context.
Solve ambitious technical problems; Identify gaps; Recommend improvements; Resolve critical path issues
What They're Looking For.
Must Have
BS in Electrical Engineering or related field, Advanced coursework in CMOS circuit building, Advanced coursework in VLSI, Advanced coursework in analog circuits, Hands-on expertise with Cadence Virtuoso, Hands-on expertise with physical layout, Hands-on expertise with circuit floorplanning, Proven experience using FINESIM, Proven experience using HSPICE, Proven experience using VERILOG, Complex circuit simulation and analysis, Solve ambitious technical problems, Significant design or innovation impact, Deep knowledge of DRAM subsystem architecture, Deep knowledge of DRAM subsystem operation, Deep knowledge of DRAM subsystem building, Experience leading multi-functional technical efforts
Nice to Have
MS or PhD in Electrical Engineering or related field, Industry awareness of memory technology trends, Industry awareness of emerging design methodologies, Exceptional communication skills, Exceptional leadership skills, Ability to influence across organizations
What You'll Do.
Optimize DRAM circuits
Develop routing strategies
Refine routing strategies
Develop power delivery networks
Refine power delivery networks
Develop sense margins
Develop die-size tradeoffs
Refine die-size tradeoffs
Perform advanced circuit simulations
Analyze long-term reliability
Verify power integrity
Verify signal integrity
Support reticle experiments
Support tape-out revisions
Drive simulation-to-silicon correlation
Identify simulation gaps
Recommend schematic improvements
Recommend layout improvements
Lead technical reviews
Lead best-practice standardization
Coordinate layout resources
Coordinate build resources
Resolve critical path issues
Serve as technical interface
Communicate project status
Communicate project risks
How You'll Work.
Team & Collaboration
Multi-functional teams; Design teams; Layout teams; Verification teams; Test teams; Technology development
Communication Scope
Communicate project status; Communicate project risks
Process & Methodology
Manage layout resources, Manage build resources
Full Job Description
**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Design Engineer, you will build the future of memory by architecting and delivering high‑performance DRAM circuit compositions for advanced technology nodes. In this highly visible technical leadership role, you’ll develop innovation across building, layout, verification, and silicon validation. You will collaborate closely with multi-functional teams to deliver scalable, manufacturable solutions for next-generation memory products. Your work will directly influence performance, power, reliability, and time‑to‑market for Micron’s groundbreaking memory technologies. ## **Responsibilities** * Design and optimize DRAM circuits spanning digital, analog, and memory core subsystems to meet aggressive power, performance, and reliability targets * Develop and refine floorplans, routing strategies, power delivery networks, sense margins, timings, and die‑size tradeoffs * Perform advanced circuit simulations using FINESIM, HSPICE, and VERILOG, analyzing speed, power, noise, and long‑term reliability * Model parasitics, verify power and signal integrity, and support validation, reticle experiments, and tape‑out revisions * Drive simulation‑to‑silicon correlation, identify gaps, and recommend schematic and layout improvements * Lead technical reviews, documentation, and best‑practice standardization across design and layout teams * Coordinate and manage layout and build resources, tracking breakthroughs and resolving critical path issues * Serve as a key technical interface across design, verification, test, and technology development while communicating project status and risks ## **Minimum Qualifications** * BS in Electrical Engineering or related field, or
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