Micron Technology
Semiconductor
Principal,IODesignEngineering
Neural analysis suggests this role is
optimal for Senior candidates.
“Principal, IO Design Engineering at Micron Technology. Skills: IO Design Engineering, High-speed circuits, Clocking circuits, DRAM products. Innovate high-speed IO circuits. Design high-speed IO circuits”
Industry & Context.
Develop engineering solutions; Analyze impairments; Analyze jitter impact; Analyze duty error impact
What They're Looking For.
Must Have
MSEE + 10 years industry experience, BSEE + 12 years industry experience, Proficiency with UNIX, Proficiency with CADENCE design environment, Understanding of device physics, Understanding of basic CMOS processing techniques, Ability to supervise layout work, Understand good layout practices, Ability to convey sophisticated technical concepts
Nice to Have
7+ years experience high-speed transmitter design, 7+ years experience high-speed receiver design, 7+ years experience high-speed clocking circuit design, Prior experience channel modeling, Prior experience channel characterization, Prior experience transceiver noise analysis, Prior experience timing budget analysis, Prior experience equalization techniques, Prior SI knowledge, Demonstrated ability mentoring engineers, Demonstrated ability coaching engineers, AI/ML usage, Fluency in PERL, Fluency in Python
What You'll Do.
Innovate high-speed IO circuits
Design high-speed IO circuits
Optimize high-speed IO circuits
Verify high-speed IO circuits
Innovate clocking circuits
Design clocking circuits
Optimize clocking circuits
Verify clocking circuits
Apply high-speed circuit design techniques
Enhance performance evaluation
Develop modeling methodology
Develop analysis methodology
Develop simulation methodology
Capture circuit performance metrics
Capture impact to product specifications
Compare silicon performance
Support correlation activities
Collaborate with process integration teams
Collaborate with transistor modeling teams
How You'll Work.
Team & Collaboration
Design peers; Product Engineering; SI team; Process integration teams; Transistor modeling teams; Product teams
Communication Scope
Convey technical concepts
Full Job Description
**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Principal IO/Clocking Design Engineer to be a part of our design team working on critical high-speed circuits common to all DRAM related memory products! In this position, you will be responsible for the development, design, optimization, verification, and fan out of these high-speed circuits to all DRAM related projects at Micron. You will work on equalization and bandwidth extension to push the speed limits of the circuit and process technology, analyze resulting IO impairments, clock jitter and duty error impact to DRAM system and timing budget, and develop effective engineering solutions. ## ## **Responsibilities:** * Innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products. * Apply proven high-speed circuit design techniques and enhance critical performance evaluation of the IO data path and clocking path at circuit level. * Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level. * Work with Product Engineering and SI team to compare silicon performance with simulation results and support correlation activities. * Collaborate with process integration and transistor modeling teams on Micron's next groundbreaking process node. ## ## **Minimum Qualifications:** * Minimum MSEE + 10 years or BSEE + 12 years of industry experience in analog and mixed-signal circuit design. * Proficiency with UNIX and CADENCE design environment (simulation, schematic entry, SPF extraction). * Understanding of device physics and basic CMOS processing techniques. * Ability to supervise layout work and u
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