Alcon

Eye Care

PrincipalFPGAImagePipelineEngineer

$0–0k Goleta, California, United States FULL TIME
The Brief

“Principal FPGA Image Pipeline Engineer at Alcon. Skills: FPGA, Image Processing, HLS, VHDL/Verilog. Develop image processing pipeline on FPGA using HLS. Translate image processing algorithm from C/Matlab to FPGA fabric”

Industry & Context.

Eye Care
Eligibility Requirements

Relocation assistance: Yes, Visa Sponsorship: Yes

What They're Looking For.

Must Have

Bachelor's Degree or Equivalent years of directly related experience, Ability to fluently read, write, understand and communicate in English, 5 Years of Relevant Experience

Nice to Have

Prior FPGA design experience with an emphasis on High Level Synthesis (HLS), developing complex architectures, implementing finite state machines, applying best‑practice design techniques such as writing constraints and closing timing, Experience with object-oriented programing with C++, Understanding of image sensor concepts like gain, exposure, shutter, Basic ISP (Image Signal Processor) knowledge like brightness, contrast, gamma, debayer, Knowledge of how to use version control, Proficient with major FPGA development environments (such as Xilinx ISE/Vivado, Altera Quartus, or Microchip LiberoSoC), at least one FPGA simulation tool (ModelSim or Questa), Proficient with following programming languages: VHDL, Verilog/System C/C++; Python, Knowledge of basic interfaces like I2C, SPI, UART/RS-232, Working experience of HyperTerminal, TeraTerm, or equivalent, Ability to read and understand schematics and PCB layout, Hands‑on experience using standard electronic test equipment (oscilloscopes, digital multimeters, frequency generators, logic analyzers, etc.), ability to troubleshoot issues at the Printed Circuit Board Assembly (PCBA) level

What You'll Do.

Develop image processing pipeline on FPGA using HLS

Translate image processing algorithm from C/Matlab to FPGA fabric

Improve algorithm in C/Matlab and HLS

Design FPGA logic using VHDL and Verilog

Close timing on FPGA designs

Interface FPGA to external hardware peripherals

Program embedded processors using C language

Test embedded system through UART/RS-232

Develop firmware following Agile Design Methodology

Use version control to commit and push firmware code

Perform code review through pull request

Write detailed design documentation

Create host computer test tool or script using C/C++ or python

Test embedded systems

How You'll Work.

Team & Collaboration

Interact with outside customers, suppliers, and functional peer groups; Communicating to vendors’ field application engineers (FAE) for technical support; Grow your career in a highly collaborative and diverse environment

Communication Scope

Fluently read, write, understand and communicate in English

Process & Methodology

Agile Design Methodology

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