Micron Technology
Semiconductor
PrincipalEngineer–HBMDesignforTest(DFT)
Neural analysis suggests this role is
optimal for Senior candidates.
“Principal Engineer – HBM Design for Test (DFT) at Micron Technology. Skills: Design for Test, HBM Design, DFT Architecture. Own and implement DFT architecture. Ensure DFT solutions enable high quality”
What You'll Achieve.
Ensure robust solutions; Ensure scalable solutions; Ensure manufacturable solutions; Ensure feature completeness; Ensure readiness for tape-out; Ensure readiness for silicon bring-up; Ensure low-cost products; Ensure manufacturable products
Industry & Context.
Root cause analysis
What They're Looking For.
Must Have
Bachelor's degree in Electrical Engineering, 8+ years of experience in semiconductor development, Working knowledge of memory architectures, Experience influencing DFT requirements
Nice to Have
Master's degree preferred, multi-functional collaboration skills, Clear written and verbal communication skills
What You'll Do.
Own and implement DFT architecture
Ensure DFT solutions enable high quality
Translate manufacturing needs into requirements
Ensure spec-to-verification coverage alignment
Identify and resolve DFT-related issues
Serve as DFT point of contact
Drive standardization of DFT features
Participate in DFT governance activities
Contribute to documentation
Contribute to knowledge sharing
Contribute to training
How You'll Work.
Team & Collaboration
Partner with Design Engineering; Partner with Product Engineering; Partner with Test; Partner with DFT Verification
Communication Scope
Written communication; Verbal communication
Full Job Description
**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Principal Engineer – HBM Design for Test (DFT) is a senior technical contributor responsible for defining, deploying, and sustaining best‑in‑class DFT solutions across HBM core die and base die spanning multiple HBM families. This role emphasizes DFT architecture, specification ownership, multi-functional alignment, and program support, supported by strong technical expertise to ensure solutions are robust, scalable, and manufacturable. The role includes a close partnership with DFT Verification to ensure feature completeness, coverage, and readiness for tape‑out and silicon bring‑up. **Key Responsibilities** * Own and implement DFT architecture and feature intent for assigned DFT domains across HBM core die and base die * Ensure DFT solutions enable high‑quality, low‑cost, and manufacturable HBM products * Partner with Design Engineering, Product Engineering, Test, and DFT Verification to: * Translate manufacturing and test needs into clear DFT requirements * Ensure spec‑to‑verification coverage alignment for DFT features and test modes * Identify and resolve DFT‑related issues during build execution, tape‑out, and silicon bring‑up * Serve as the DFT point of contact for assigned programs or functional areas * Drive standardization and reuse of DFT features across HBM families * Participate in DFT governance activities, including design and verification readiness reviews * Contribute to documentation, knowledge sharing, and training within the DFT organization **Minimum Qualifications:** * Bachelor’s degree in Electrical Engineering or related field (Master’s preferred) * 8+ years of experience in semiconductor development with exposure to DFT, verification,
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