Sandisk

Technology

PrincipalEngineer,ASICDevelopmentEngineering(Mixed-SignalIPLayout)

₹45–70L ~AI est. Bengaluru, Karnataka, India FULL TIME
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for mid candidates.

The Brief

“Principal Engineer, ASIC Development Engineering (Mixed-Signal IP Layout) at Sandisk. Skills: Mixed-Signal IP Layout, Layout optimization. Develop and optimize MSIP IC layouts. Ensure high performance and manufacturability”

Industry & Context.

Technology
Problems you'll solve

Problem-solving skills; Creative solutions

What They're Looking For.

Must Have

8-12 years Analog/High Speed DDR IO IC layout design, Proficiency in layout tools Cadence, Synopsys, or Mentor Graphics, Hands-on custom layout design Analog and IO circuits, Expertise in Bandgap references, LDOs, Clocking circuits, GPIOs, High speed DDR IOs, Familiarity with custom digital layout, Knowledge of signal integrity issues, Understanding of analog/IO design principles, Aware of layout techniques ESD, latch-up issues, Advanced knowledge CMOS and FinFET technologies, Experience with layout concepts reliability considerations, Experience with layout optimization PPA metrics, Excellent problem-solving skills, Attention to detail, Effective communication, Teamwork abilities

Nice to Have

AI knowledge/experience improve Layout development effort and QoR

What You'll Do.

Develop and optimize MSIP IC layouts

Ensure high performance and manufacturability

Collaborate with design engineers

Understand design requirements

Translate requirements into precise layouts

Work closely with physical design team

Integrate custom blocks into chip design

Identify and resolve layout-related issues

Provide creative solutions

Conduct design reviews

Provide technical feedback

Improve layout practices

Improve layout methodologies

Stay up-to-date industry trends

Stay up-to-date tools

Stay up-to-date technologies

Enhance layout processes

How You'll Work.

Team & Collaboration

Design engineers; Physical design team

Full Job Description

Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. We are looking for technically sound and highly skilled Analog/High Speed DDR IO Layout designer with 8-12 years of experience. The ideal candidate should have a strong background in analog/IO design principles, hands-on experience with layout tools, and a passion for solving challenging technical problems. Key Responsibilities: * Develop and optimize MSIP IC layouts in TSMC 3nm, ensuring high performance and manufacturability. * Collaborate with design engineers to understand design requirements and translate them into precise layouts. * Strong experience in debugging DRC, ERC, LVS, EMIR and PERC issues independently. * Work closely with the physical design team to integrate custom blocks into the overall chip design. * Identify and resolve layout-related issues, providing creative solutions to meet design specifications. * Conduct design reviews and provide technical feedback to im

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