Astera Labs
Technology
PrincipalDFTEngineer
Neural analysis suggests this role is
optimal for Principal candidates.
“Principal DFT Engineer at Astera Labs. Skills: DFT Architecture, DFT Implementation, DFT Verification, Silicon Bring-up. Define DFT architecture for SoCs. Own DFT architecture”
What You'll Achieve.
Ensure successful tapeout; Ensure first-pass silicon success; Ensure production quality
Industry & Context.
Root cause analysis
What They're Looking For.
Must Have
Bachelor’s degree in Electrical Engineering, 12+ years of experience in DFT design, Experience leading DFT activities, Deep expertise in DFT techniques, Understanding of DFT and Physical Design flows, Experience with industry-standard DFT tools, Solid experience with DFT verification methodologies, Scripting skills (Tcl, Python, or Perl)
Nice to Have
Master’s degree preferred, Experience with advanced process nodes, Background in high-speed connectivity designs, Experience with hierarchical DFT methodologies, Knowledge of silicon bring-up, Familiarity with STA, low-power design, CDC
What You'll Do.
Define DFT architecture for SoCs
Lead DFT specification
Provide technical leadership
Drive DFT sign-off readiness
Lead DFT implementation
Lead DFT verification
Own end-to-end DFT activities
Ensure high test coverage
Ensure robust pattern generation
Align with manufacturing requirements
Develop scalable DFT methodologies
Drive scalable DFT flows
Develop automation frameworks
Optimize DFT integration
Improve turnaround time
How You'll Work.
Team & Collaboration
RTL teams; Physical Design teams; STA teams; Test Engineering teams; Cross-functional teams globally
Process & Methodology
Project lifecycle management
Full Job Description
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com. Role Overview Astera Labs is establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a visionary Principal DFT Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, ensuring the reliability and testability of chips that power the world's largest AI clusters. As a Principal DFT Engineer, you will provide technical leadership across the full DFT lifecycle—from architecture and specification through implementation, verification, and silicon bring-up. You will define and drive DFT strategy, establish robust methodologies, and lead execution to ensure high test quality and manufacturability. This role requires deep expertise, cross-functional influence, and the ability to drive DFT excellence across projects and teams. This is a critical leadership position with high impact on first-pass silicon success and production quality for next-generation AI connectivity solutions. Key Responsibilities DFT Architecture & Technical Leadershi
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