Micron Technology
Semiconductor
PrincipalDesignAIEngineer
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optimal for Principal candidates.
“Principal Design AI Engineer at Micron Technology. Skills: NAND design, Circuit design, Design automation, AI enablement. Implement Xpath design. Implement Ypath design”
What You'll Achieve.
Deliver measurable cycle-time reduction
Industry & Context.
Solving sophisticated technical problems; Debug
What They're Looking For.
Must Have
MS or PhD in electrical engineering, 8+ years NAND design experience, Proficient in analog/mixed signal circuit design, Proficient in analog/mixed signal circuit layout, Proficient fundamentals in semiconductor physics, Proficient fundamentals in analog/mixed-signal circuit design, Understanding of semiconductor reliability issues, Understanding of Electro-migration (EM) and IR analysis, Proficiency in circuit verification and optimization, Proficiency in layout planning, Proficiency in parasitic extractions, Experience guiding layout, Understanding of circuit design verification flows, Experience with block-level simulations, Experience with subsystem-level simulations, Experience with full-chip simulations, Experience with corner management, Experience with PVT/mismatch analysis, Experience with results qualification, Proficiency in Python for engineering automation, Proficient with Cadence design, Proficient with LVS/DRC tools, Proficient with UNIX
Nice to Have
PhD in electrical engineering preferred
What You'll Do.
Implement Xpath design
Implement Ypath design
Implement Array design
Integrate Core schematics into fullchip schematics
Validate design performance
Validate design functionalities
Run block level simulations
Run chip level simulations
Mentor other engineers
Implement analog circuit design
Implement mixed signal circuit design
Serve as technical authority
Solve technical problems
Develop agentic enablement for circuit design
Productize agentic enablement
Support environment setup
Support self-healing configuration
Support guided simulation
Support intelligent corner planning
Support coverage closure
Support automated schematic checks
Support automated layout checks
Support documentation synthesis
Support knowledge retrieval
Support block verification
Support subsystem verification
Support full-chip verification
Integrate automation with project execution
Align tooling with achievement needs
Deliver measurable cycle-time reduction
Collaborate with multi-functional team members
Ensure automation choices support manufacturability
Ensure environmental choices support testability
Ensure automation choices support reliability
Ensure environmental choices support time-to-market
Ensure automation choices support customer happiness
How You'll Work.
Team & Collaboration
Project teams; Analog/core teams; Circuit designers; Firmware teams; Validation teams; Architecture teams; Product Engineering; Test; Probe; Process Integration; Assembly; Marketing
Process & Methodology
Project execution
Full Job Description
**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Design Engineer in the NVE Design Engineering organization at Micron Technology, Inc., you will drive the transformation of NAND circuit development through design automation, agentic circuit-design enablement, and environment transition! **_What’s Encouraged Daily!_** * Implementing core Xpath, Ypath and Array design during project execution and work with project teams integrating the Core schematics into the fullchip schematics, validating design performance and functionalities by running block and chip level simulations using standard industry simulators and mentor other engineers for the same. * Implementing analog and mixed signal circuit design (charge pumps, op amps, DACs, ADCs, linear regulators, oscillators, bandgap, LDO, thermometers, page buffers, PDNs, level shifters, IO buffers, RTL, Verilog) to meet specifications, validating design performance and functionalities by running block and chip level simulations using standard industry simulators and mentor other engineers for the same. * serve as a technical authority across analog/core teams, solving sophisticated technical problems at the intersection of circuit behavior, modeling, simulation methodology, and automation reliability. * Develop and productize agentic enablement for circuit design, including AI/LLM-assisted flows that support: * environment setup and self-healing configuration, * guided simulation and debug, * intelligent corner planning and coverage closure, * automated schematic/layout checks and review assistance, * documentation synthesis and knowledge retrieval from internal sources, * block/subsystem/full-chip verification (analog/mixed-signal), including reproducib
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