Blue Origin

Satellite communication

PrincipalASICDesignEngineer

$231–323k San Antonio, Texas, United States; United States FULL TIME Remote Friendly
The Brief

“Principal ASIC Design Engineer at Blue Origin. Skills: ASIC design, digital design, microarchitecture, communication signal-processing hardware, system integration. Define top-level or cross-subsystem digital architecture for Satellite communication ASICs and SoCs. Lead hardware realization of key communication functions such as modem pipelines, coding engines, digital beamforming, switching fabrics, and packet/data processing”

Industry & Context.

Satellite communication
Eligibility Requirements

U. S. citizen or national, U. S. permanent resident (i. e. current Green Card holder), or lawfully admitted into the U. S. as a refugee or granted asylum, Blue’s Standard Background Check

What They're Looking For.

Must Have

BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field, 12+ years of ASIC design experience, including ownership of complex chips or multiple tape-outs, Expert-level knowledge of digital design, microarchitecture, and full-chip tradeoffs, Proven success leading technically exciting silicon programs, understanding of communication signal-processing hardware and system integration, Ability to influence across organizations and communicate complex technical topics clearly

Nice to Have

Deep expertise in Space based communications, digital modems, phased arrays, or payload processing, Experience in advanced FEC architectures, timing recovery, carrier recovery, or channel adaptation hardware, Familiarity with rad-hard, fault-tolerant, or high-availability digital design techniques, Experience guiding architecture across both commercial and mission-critical applications, record of innovation, patents, publications, or major product launches

What You'll Do.

Define top-level or cross-subsystem digital architecture for Satellite communication ASICs and SoCs

Lead hardware realization of key communication functions such as modem pipelines

and packet/data processing

Drive end-to-end technical planning from concept through silicon validation

Establish system-level tradeoffs among throughput

and manufacturability

Provide technical leadership across design

Review and influence architectural partitioning between ASIC

and RF/analog domains

Develop methodologies and reusable IP strategies that improve schedule

Mentor technical leaders and act as a go-to expert for critical design reviews and issue resolution

Support roadmap planning and future product definition

How You'll Work.

Team & Collaboration

Provide technical leadership across design, verification, physical design, firmware, packaging, and system teams; Review and influence architectural partitioning between ASIC, FPGA, software, and RF/analog domains; Mentor technical leaders and act as a go-to expert for critical design reviews and issue resolution

Communication Scope

communicate complex technical topics clearly

Process & Methodology

Drive end-to-end technical planning from concept through silicon validation, Proven success leading technically exciting silicon programs

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