Cerebras Systems
PhysicalDesignEngineer
Neural analysis suggests this role is
optimal for Senior candidates.
“Physical Design Engineer at Cerebras Systems. Skills: Physical design, 3D integration, ASIC/SoC design. Design 3D integrated products. Analyze 3D integrated products”
Industry & Context.
IR analysis resolution
What They're Looking For.
Must Have
10+ years physical design/verification, Block level verification methodology, Full-chip verification methodology, Optimize power/performance/area, Complete physical design flow, ICV or Calibre tools, Resolve DRC issues, Resolve LVS issues, IR analysis and resolution, Scripting languages, Flow enhancements, Work with RTL teams, 2.5D or 3D packaging solutions, 3D physical design, 3D die stacking, 3D chip design, Die-to-die integration, Wafer-to-wafer integration
Nice to Have
Full chip floor planning, Clock distribution knowledge, Cooling analysis knowledge
What You'll Do.
Design 3D integrated products
Analyze 3D integrated products
Optimize for performance
How You'll Work.
Team & Collaboration
Physical design team; Architecture team; RTL team
Full Job Description
Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras, to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. About The Role As a member of our tight knit physical design team, you will be working on the design and analysis of 3D integrated products. This role involves a combination of traditional ASIC/SoC physical design skills, packaging, power, clock and cooling analysis. You will work closely with the architecture and RTL team to do R&D on novel concepts for 3D integration. Skills and Qualifications Required 10+ years of physical design/verification experience. Strong knowledge of block level and full-chip physical verification methodology. Expert at optimizing for the best power/performance and area. Experience with the complete physical design flow. Knowledge of Synopsys tool suite is a plus. Expert with ICV or Calibre tools resolving block and full-chip DRC and LVS issues. Expert with IR/EM analysis and resolution. Strong ability in scripting languages
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