Oxford Ionics
Quantum Computing
PhotonicLayoutEngineer
“Photonic Layout Engineer at Oxford Ionics. Skills: Photonic Integrated Circuit (PIC) layout, Python for photonic mask layout, DRC and LVS verification. Layout of photonic integrated circuits (PICs). Integrating photonic components into complex multi-layer chips”
What You'll Achieve.
Effective delivery of devices that make use of on-chip light delivery to allow scaling to thousands of qubits and beyond; Success of building utility-scale quantum computers
Industry & Context.
Consider requirements and constraints from other parts of the chip in the layout process
What They're Looking For.
Must Have
Significant experience in the design and layout of Photonic Integrated Circuits (PICs), Ability to consider requirements and constraints from other parts of the chip in the layout process, Understanding the purposes of different photonic components, Ability to contribute effectively within a fast moving, highly technical team, Proficiency in Photonic Integrated Circuit layouts, Familiarity with the principles of photonic devices, such as waveguides, beamsplitters, grating couplers or similar, including design, test and fabrication, At least 2 years of experience working with Python software packages, specifically for photonic mask layout, such as Luceda IPKISS, GDSFactory or Klayout, A degree in Photonics, Physics, Electrical Engineering or a related field, or equivalent industry experience, Collaboration and communication skills, Ability to work independently and prioritise tasks in a time-sensitive environment
Nice to Have
Experience in generating layout files for photonic devices or complex semiconductor devices, particularly with custom elements, Knowledge of the manufacturing processes and techniques in these two fields, Background in commercial simulation, verification and layout environments such as Synopsys, Cadence or Ansys, Programming and software skills
What You'll Do.
Layout of photonic integrated circuits (PICs)
Integrating photonic components into complex multi-layer chips
Arranging and routing photonic components on chip
in coordination with metal track and CMOS routing
Producing reticle-size photonic layout files using Python scripts
Layout verification through DRC and LVS
Contributing to custom layout Process Design Kits (PDKs)
Documenting the layout process and the final tape-out mask files
How You'll Work.
Team & Collaboration
Work closely with scientists, photonic design engineers and fabrication engineers; Collaborate with scientists to discuss their requirements; Interfacing with photonic designers, test engineers, packaging engineers and fabrication engineers to define design rules and shape component design; Contribute effectively within a fast moving, highly technical team
Communication Scope
Collaboration and communication skills
Process & Methodology
Prioritise tasks in a time-sensitive environment
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