Etched
AI
PDIntern-Spring2027
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“PD Intern - Spring 2027 at Etched. Skills: Physical Design, ASIC/SoC Design, AI/ML. Realizing front-end designs in silicon. Assisting in developing and running Physical Design flows”
What You'll Achieve.
Improve iteration speed to final signoff
Industry & Context.
What They're Looking For.
Must Have
Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field, Familiarity with high-speed digital logic, Exposure to ASIC or SoC design concepts, Familiarity with SystemVerilog, UVM, or Python, Familiarity with verification work and writing test benches, Familiarity with physical design flows and tooling, Able to learn quickly about transformers and other aspects of modern artificial intelligence
Nice to Have
Familiarity with transformer models and machine learning, Familiarity with numerical representations and functions (RTL), Familiarity with clocking and reset schemes (RTL/PD), UVM or formal verification experience (DV), Ability to program with Python or another scripting language
What You'll Do.
Realizing front-end designs in silicon
Assisting in developing and running Physical Design flows
Automating final design checks
Advising RTL design decisions
Full Job Description
About Etched Etched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary As a Physical Design intern for Etched next spring, you will be responsible for realizing our front-end designs in silicon, helping Etched to improve iteration speed to final signoff. You will assist in developing and running Physical Design flows to synthesize blocks, automate final design checks, and advise RTL design decisions. You may be a good fit if you have - Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field. - Familiarity with high-speed digital logic - Exposure to ASIC or SoC design concepts - Familiarity with SystemVerilog, UVM, or Python - Familiarity with verification work and writing test benches - Familiarity with physical design flows and tooling - Are able to learn quickly about transformers and other aspects of modern artificial intelligence Strong candidates may also have experience with - Familiarity with transformer models and machine learning - Familiarity with numerical representations and functions (RTL) - Familiarity with clocking and reset schemes (RTL/PD) - UVM or formal verification experience (DV) - Ability to program with Python or another scripting language We encourage you to apply even if you do not believe you meet every single qualification. Program details - 12-week paid internship - Generous housing support for those relocating - Daily lunch and dinner in our office - Based at our office in San Jose,
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