Micron Technology

Semiconductor

NewCollegeGrad-MixedSignalDesignEngineer,HBM

$85–115k ~AI est. Richardson, Texas, United States FULL TIME
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for Entry candidates.

The Brief

“New College Grad - Mixed Signal Design Engineer, HBM at Micron Technology. Skills: Mixed Signal Design, HBM products, Digital foundations, Mixed-signal foundations. Assist defining digital micro-architecture. Assist carrying out digital micro-architecture”

What You'll Achieve.

Deliver robust first-pass silicon; Meet bandwidth objectives; Meet latency objectives; Meet power objectives; Meet reliability objectives

Industry & Context.

Semiconductor
Problems you'll solve

Debugging; Issue correlation; Troubleshooting

What They're Looking For.

Must Have

Bachelor's degree or equivalent experience in Electrical Engineering or Computer Engineering, Experience with digital build or SoC integration, Knowledge of SystemVerilog RTL build, Knowledge of clock and reset architecture, Knowledge of CDC/RDC methodologies, Knowledge of low-power design concepts, Grasp of design-for-debug principles, Grasp of design-for-test principles, Experience working alongside multiple engineering groups

Nice to Have

Exposure to post-silicon validation, Exposure to silicon bring-up, Exposure to structured debug workflows, Experience with scan, Experience with memory built-in self-test (MBIST), Experience with logic built-in self-test (LBIST), Experience with related test and debug features, Experience developing verification plans, Experience supporting verification plans, Collaborating with build verification teams, Curiosity about refining micro-architecture, Understanding build tradeoffs

What You'll Do.

Assist defining digital micro-architecture

Assist carrying out digital micro-architecture

Translate system requirements

Help maintain interface specifications

Implement synthesizable SystemVerilog RTL

Integrate synthesizable SystemVerilog RTL

Support clean integration flows

Collaborate with design verification teams

Support verification planning

Support coverage goals

Support CDC/RDC checks

Support debugging of RTL issues

Support debugging of testbench issues

Support debugging of gate-level issues

Support silicon bring-up

Support post-silicon validation

Correlate issues to RTL

Correlate issues to architecture

How You'll Work.

Team & Collaboration

Multiple engineering areas; Design verification teams; DFT teams; Test teams

Full Job Description

**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join Micron’s Memory Systems Engineering team and contribute to the development of premier digital and mixed-signal foundations for our high-bandwidth memory (HBM) products. This position offers an outstanding chance to work intimately with multiple engineering areas, guaranteeing the smooth integration and implementation of HBM base die. Join a motivated team committed to delivering robust first-pass silicon that meets our strict bandwidth, latency, power, and reliability objectives! ## Responsibilities * Assist in defining and carrying out digital micro-architecture for HBM base-die subsystems, covering channel support logic, boot and initialization sequencing, training orchestration, configuration and status registers, telemetry, performance counters, and reliability features. * Translate system requirements into timing, power, and area considerations by partnering with physical layer and system architects, and help maintain interface specifications for bus protocols, clock-domain crossings, and reset strategies. * Implement and integrate synthesizable SystemVerilog RTL, including multi-channel logic, interrupts, events, register maps, scan hooks, and design-for-test interfaces, while supporting clean integration and ECO flows. * Collaborate with design verification teams to support verification planning, coverage goals, CDC/RDC checks, and debugging of RTL, testbench, and gate-level issues. * Support silicon bring-up and post-silicon validation through debug enablement, issue correlation to RTL or architecture, and collaboration with DFT and test teams. ## Minimum Qualifications * Bachelor’s degree or equivalent experience in Electrical Engineering or Compute

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