Micron Technology
Semiconductor
MTS,IODesignEngineering
Neural analysis suggests this role is
optimal for Senior candidates.
“MTS, IO Design Engineering at Micron Technology. Skills: IO design engineering, High-speed circuits, DRAM products, Clocking circuits. Innovate high-speed IO circuits. Design high-speed IO circuits”
Industry & Context.
Develop engineering solutions
Relocation to Boise, Idaho required
What They're Looking For.
Must Have
MSEE + 10 years or BSEE + 12 years industry experience, Designing high-speed IO interface, Designing timing and clocking circuits, Proven silicon successes, Supervise layout work, Understand good layout practices, Convey sophisticated technical concepts verbally and written, Mental agility, Ability to multi-task
Nice to Have
DRAM circuit design experience, Channel modeling and characterization, Transceiver noise and timing budget analysis, Equalization techniques, SI knowledge, Understanding of device physics, Basic CMOS processing techniques, Mentoring and coaching engineers, AI/ML usage, Fluency in PERL/Python
What You'll Do.
Innovate high-speed IO circuits
Design high-speed IO circuits
Optimize high-speed IO circuits
Verify high-speed IO circuits
Innovate clocking circuits
Design clocking circuits
Optimize clocking circuits
Verify clocking circuits
Apply high-speed circuit design techniques
Enhance performance evaluation
Analyze IO data path timing
Analyze clock path timing
Develop modeling methodology
Develop analysis methodology
Develop simulation methodology
Compare silicon performance
Support correlation activities
Collaborate with process integration
Collaborate with transistor modeling teams
How You'll Work.
Team & Collaboration
Design peers; Product Engineering; SI team; Process integration teams; Transistor modeling teams
Communication Scope
Convey technical concepts
Full Job Description
**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking an MTS IO/Clocking Design Engineer to join our IP Design team and contribute to the development of critical high-speed IP circuits used across Micron’s DRAM memory products. In this role, you will be responsible for the design, development, optimization, verification, and technical support of these high-speed IPs. You will focus on equalization and bandwidth extension to push the limits of circuit and process performance, analyze IO impairments as well as clock jitter and duty cycle distortion, and assess their impact on DRAM system timing. You will also develop and implement effective engineering solutions to address these challenges. Relocation to Micron headquarter in Boise, Idaho is required for this position. ## ## **Responsibilities:** * Innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products. * Apply robust high-speed circuit design techniques and enhance critical performance evaluation, including timing and jitter sensitivity, of the IO data path and clock path at circuit and full-chip level. * Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level. * Work with Product Engineering and SI team to compare silicon performance with simulation results and support correlation activities. * Collaborate with process integration and transistor modeling teams on Micron's next groundbreaking process node. ## ## **Minimum Qualifications:** * Minimum MSEE + 10 years or BSEE + 12 years of industry experience with strong background in designing high-speed IO interface, timing and clocking c
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