MTSASICArchitect

**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. **DRAM ASIC Architecture** **Role Overview** The **DRAM ASIC Architecture team** defines silicon level architectures that extend and differentiate the value of Micron’s DRAM products. The team works across technology generations and product lines, collaborating closely with design, product, systems, and ecosystem partners to deliver scalable, reliable, and high-performance memory solutions aligned with customer and market needs. As a **Member of Technical Staff** , you will provide senior level architectural leadership for ASIC and logic-based DRAM solutions that emphasize **high bandwidth, energy efficiency, scalability, and reliability**. This role spans **near term product execution** and **long term technology direction** , with architectural ownership over decisions that impact bandwidth density, latency, RAS, and system observability. **Key Responsibilities** * **High‑Bandwidth DRAM Architecture** * Define ASIC and logic architectures that enable high data throughput, efficient parallelism, and scalable bandwidth delivery for advanced DRAM products. * Drive architectural features that improve effective bandwidth, latency efficiency, and utilization under demanding workloads. * **Silicon–Package–System Co‑Optimization** * Lead architectural trade‑off analyses across DRAM silicon, ASIC logic, packaging constraints, and system integration considerations. * Ensure architectural choices account for power delivery, thermals, signal integrity, and form‑factor limitations. * **Architectural Partitioning & Interfaces** * Influence functional partitioning and interface definition across DRAM devices and associated logic to optimize performance, power, and scalability