Tenstorrent
Technology
METIInternshipProgram-RISCVCourse
Neural analysis suggests this role is
optimal for Mid+ candidates.
“METI Internship Program - RISC V Course at Tenstorrent. Skills: AI accelerators, ASIC design, FPGA, RISC V”
Industry & Context.
Eligible to access U. S. export-controlled technology
What They're Looking For.
Must Have
Academic background equivalent to a degree in EE/CS or related field, Proficiency in Linux, Tcl/Tk, Perl, and Python, Advanced communication skills in both Japanese and English
Nice to Have
Mid to senior-level engineers, Master's or doctoral degree, Practical experience in AI accelerators, Practical experience in ASIC design, Practical experience in FPGA, Experience in HDL like SystemVerilog, Leadership experience in large-scale chip development projects, Advanced experience in using EDA tools, Ability to provide technical explanations and presentations
How You'll Work.
Communication Scope
Japanese; English
Full Job Description
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. *This page is for METI internship program. If you are applying for other full-time role, you can browse here* If you have any questions regarding application, please contact to [email protected] Experience & Qualifications: Must Academic background equivalent to a degree in EE/CS or related field. Proficiency in Linux, Tcl/Tk, Perl, and Python etc programming. Advanced communication skills in both Japanese and English. Want Mid to senior-level engineers or individuals with a master's or doctoral degree Practical experience in related fields such as AI accelerators, ASIC design, and FPGA. Experience in HDL like SystemVerilog. Leadership experience in large-scale chip development projects. Advanced experience in using EDA tools. Ability to provide technical explanations and presentations This offer of employment is contingent upon the applicant being eligible to access U. S. export-controlled technology. Due to U. S. export laws, including those codified in the U. S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U. S. and all countries outside the U. S. As the position offered will have direct and/or indirect access to infor
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