Memory Systems Performance & Workload Architect
Technology
MemorySystemsPerformance&WorkloadArchitect-DMTS/SMTS
Neural analysis suggests this role is
optimal for Mid+ candidates.
“Memory Systems Performance & Workload Architect - DMTS/SMTS at Memory Systems Performance & Workload Architect. Skills: Memory Systems, Performance Engineering, Workload Analysis, Architecture. Define benchmarking framework. Characterize memory bandwidth”
What You'll Achieve.
Translate behavior into architecture; Translate behavior into product features; Translate behavior into ecosystem innovations; Establish Micron as leader; Guide product decisions; Influence product roadmaps; Translate models into product requirements; Translate models into performance targets; Translate models into customer guidance
Industry & Context.
Root cause analysis; Identify bottlenecks; Drive optimizations; System-level tradeoff analysis; What-if exploration
What They're Looking For.
Must Have
15+ years in memory systems, 5+ years of experience with programming languages, Bachelor's degree with 15+ years of experience, Master's degree with 14+ years of experience, PhD with 12+ years of experience
Nice to Have
Experience with AI/ML workloads, Expertise in databases and cloud-native systems, Expertise in performance modeling, Familiarity with ARM and x86 system architectures
What You'll Do.
Define benchmarking framework
Characterize memory bandwidth
Characterize memory latency
Characterize tail latency
Characterize access patterns
Characterize NUMA behavior
Characterize cache interaction
Characterize memory-level parallelism
Define workload suites
Drive tradeoff analysis
Influence memory controller policies
Influence heterogeneous memory hierarchies
Establish performance modeling frameworks
Establish analytical simulation frameworks
Establish trace-driven workload replay frameworks
Lead what-if exploration
Translate models into requirements
Drive end-to-end optimizations
Influence Linux kernel memory management
Influence data placement
Influence memory tiering strategies
Partner with ecosystem teams
How You'll Work.
Team & Collaboration
Cross-organizational alignment; Cross-functional leadership; Executive levels; Cross-organizational levels; Ecosystem teams
Full Job Description
**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Lead Micron’s workload-driven memory architecture and performance strategy across mobile and server-class platforms, shaping the future of DRAM, LPDDR, and HBM based memory systems. Own the end-to-end vision for workload characterization, benchmarking, and performance modeling, translating real-world application behavior into next-generation memory architecture, product features, and ecosystem innovations. Drive cross-organizational alignment spanning silicon, controllers, firmware, OS, hyperscalers, and industry partners, establishing Micron as a leader in workload-informed memory design. **Role Type:** DMTS/SMTS **Domain:** Memory Systems Architecture, Workload Analysis, Performance Engineering for servers and mobiles. **Key Responsibilities** **Benchmarking & Workload Characterization** * Define the industry-leading benchmarking framework for Mobile(Geekbench, PCMark, MLPerf Mobile, real app traces etc) and Server( SPEC CPU, SPECrate, STREAM, MLPerf, database/cloud workloads) * Characterize, Memory bandwidth, latency, QoS, tail latency, Access patterns (locality, working set, read/write mix), NUMA behavior, cache interaction, memory-level parallelism * Define and maintain representative workload suites for customer scenarios **Root Cause Analysis & Optimization** * Lead deep dives using PMU counters, perf, eBPF, ftrace, ARM Streamline / VTune equivalents * Identify bottlenecks in Memory controller scheduling, DRAM timing and row-buffer locality, Cache/memory interaction * Drive optimizations across, Kernel (NUMA, huge pages, memory policies), Firmware / BIOS tuning, Application-level performance tuning **Architecture & System-Level Innovation** * Drive system-
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