Micron Technology
Semiconductor
MemberofTechnicalStaff(MTS)–HBMDesignforTest(DFT)
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“Member of Technical Staff (MTS) – HBM Design for Test (DFT) at Micron Technology. Define DFT architecture. Define technical framework”
What You'll Achieve.
Deliver high-quality products; Deliver low-cost products; Deliver manufacturable products; Improve scalability; Reduce execution variability; Improve DFT clarity; Improve verification quality; Improve execution predictability
Industry & Context.
Resolution of issues
What You'll Do.
Define DFT architecture
Define technical framework
Deliver high-quality products
Deliver low-cost products
Deliver manufacturable products
Align architecture reviews
Assess design readiness
Assess verification readiness
Interface with Design Engineering
Interface with DFT Verification
Interface with Product Engineering
Drive spec-to-coverage rigor
Drive standardization
Reduce execution variability
Influence DFT roadmap
Incorporate silicon learning
Incorporate verification feedback
Incorporate manufacturing needs
Champion process improvements
Improve verification quality
Improve execution predictability
How You'll Work.
Team & Collaboration
Design Engineering; DFT Verification; Product Engineering; Test
Communication Scope
Written communication; Verbal communication
Full Job Description
**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Member of Technical Staff (MTS) – HBM Design for Test (DFT) is a senior technical leader responsible for defining DFT strategy, architecture, and governance across HBM core die and base die for all HBM families. This role provides technical leadership across build, verification, and manufacturing interfaces, ensuring DFT solutions are consistent, scalable, and verifiable. The MTS serves as a design authority for HBM DFT, guiding how DFT features are specified, reviewed, verified, and deployed across programs. **Key Responsibilities** * Define and own the DFT architecture and technical framework across the HBM core die and base die * Ensure DFT solutions collectively deliver high‑quality, low‑cost, and manufacturable HBM products * Lead DFT governance, including: * Architecture alignment reviews * Design and verification readiness assessments * Resolution of cross‑program DFT issues * Serve as the primary technical interface for DFT with Design Engineering, DFT Verification, Product Engineering, and Test * Drive spec‑to‑coverage rigor for DFT features and test modes across programs * Drive standardization, documentation, and automation to improve scalability and reduce execution variability * Influence the long‑term DFT roadmap, incorporating silicon learning, verification feedback, and manufacturing needs * Champion process improvements that improve DFT clarity, verification quality, and execution predictability **Minimum Qualifications:** * Bachelor’s degree in Electrical Engineering or related field (Master’s or PhD preferred) * 10+ years of experience in semiconductor development with deep exposure to DFT, verification strategy, or manufacturability * Demo
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