Cadence
Semiconductor
LeadSolutionsEngineer–RunsetEnablement(PhysicalVerification)
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“Lead Solutions Engineer – Runset Enablement (Physical Verification) at Cadence. Skills: Runset enablement, Physical verification, Automation frameworks, Customer support. Drive development and validation of runsets. Design, enhance, and maintain automation frameworks”
What You'll Achieve.
Timely delivery of physical verification solutions; High-quality solution delivery for advanced process nodes; Improve solution quality and performance
Industry & Context.
Hands-on problem-solving; Technical execution skills
What They're Looking For.
Must Have
MS degree with 5+ years of experience or PhD with 3+ years in Electrical Engineering, Computer Science, or related field, understanding of semiconductor design flows and physical verification methodologies, Proven hands-on experience developing and validating DRC and LVS runsets using Pegasus or comparable tools, Experience building or maintaining automation for regression, validation, and reporting, Proficiency in TCL, Python, and/or Perl, experience in Linux/Unix environments, Solid understanding of advanced process technologies and verification methodologies, Familiarity with chip fabrication processes and advanced-node challenges
Nice to Have
Experience with PERC and Fill runsets
What You'll Do.
Drive development and validation of runsets
and maintain automation frameworks
Collaborate with R&D and cross-functional teams
Provide technical enablement and support to customers
Apply and refine best practices for runset development
Work independently on complex technical deliverables
Partner with internal teams for timely delivery
How You'll Work.
Team & Collaboration
Close collaboration with customers and internal engineering teams; Collaborate closely with R&D and cross-functional teams; Contribute knowledge and guidance within the team; Ability to collaborate effectively across cross-functional and global teams
Communication Scope
Clear written and verbal communication skills for technical and customer interactions
Process & Methodology
Driving technical tasks to completion
Full Job Description
## **At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.** Cadence is seeking a Lead Solutions Engineer specializing in runset enablement to support advanced semiconductor technologies. This role is critical to the timely delivery of physical verification solutions and provides full‑time coverage in the U.S. time zone. The position emphasizes deep technical execution, problem‑solving, and close collaboration with customers and internal engineering teams. As a Lead Solutions Engineer, you will focus on hands‑on development and validation of Pegasus DRC and LVS runsets, enable adoption through automation and best practices, and contribute directly to high‑quality solution delivery for advanced process nodes. **Key Responsibilities** * Drive hands‑on development and validation of Pegasus DRC and LVS runsets for advanced semiconductor nodes. * Design, enhance, and maintain automation frameworks for regression execution, issue detection, and validation reporting. * Collaborate closely with R&D and cross‑functional teams to debug issues, validate fixes, and improve solution quality and performance. * Provide technical enablement and support to customers on tool usage and advanced physical verification methodologies. * Apply and help refine best practices for runset development, validation, and quality assurance. * Work independently on complex technical deliverables while contributing knowledge and guidance within the team. * Partner with internal teams to support predictable and timely delivery of physical verification solutions. **Qualifications** * MS degree with 5+ years of experience or PhD with 3+ years in Electrical Engineering, Computer Science, or related field. * Strong understanding of semiconductor design flows and physical verification methodologies. **Experience and Technical Skills** * Proven hands‑on experience developing and validating DRC and LVS runsets using Pegasus or comparable tools such as C
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