Neurophos
Technology
LeadFPGADesignEngineer
Neural analysis suggests this role is
optimal for Lead candidates.
“Lead FPGA Design Engineer at Neurophos. Skills: FPGA Design Lead, Hardware Emulation, RTL Implementation. Lead FPGA platform selection. Procure FPGA prototyping platforms”
Industry & Context.
Solve complex timing issues; Solve functional issues; Tackle ambiguous challenges
What They're Looking For.
Must Have
10+ years of industry experience, 5+ years FPGA design, Expert-level SystemVerilog, Deep Xilinx Vivado experience, Proven PCIe interface experience, Startup mindset, Hands-on board-level bringup, Lab debugging experience
Nice to Have
Scripting languages experience, SoC architectures knowledge, AMBA bus protocols knowledge, High-speed SERDES tuning familiarity, Signal integrity concepts familiarity
What You'll Do.
Lead FPGA platform selection
Procure FPGA prototyping platforms
Adapt ASIC RTL onto FPGA
Integrate in-house designs
Integrate third-party IP
Design high-speed interfaces
Validate PCIe Gen 3/4/5
Develop FPGA tester designs
Facilitate post-silicon validation
Facilitate device characterization
Facilitate automated testing
How You'll Work.
Team & Collaboration
Foundational silicon team; Cross-functional teams
Full Job Description
ABOUT NEUROPHOS The demand for new datacenters and AI compute is rapidly outpacing the planet's energy capacity. Digital solutions are hitting a power wall as we approach the physical limits of traditional silicon. Conquering this bottleneck isn’t about bigger chips or more of them; it means rethinking the fundamental architecture. The industry's current path isn’t going to meet the need, so we took a different approach. Instead of traditional electronic circuits, we use silicon photonics and an active, programmable metasurface to perform matrix multiplications at the speed of light. Our optical cells are 10,000x smaller than traditional photonic components, enabling unprecedented density. By using photonics instead of electricity, our chips become more efficient as they scale. This architecture will deliver up to 100 times the energy efficiency of existing solutions while significantly improving performance for large-scale AI inference. We’ve assembled a world-class team of industry veterans and recently raised a $110M Series A https://www.neurophos.com/110m-raise led by Gates Frontier. Participants include M12 (Microsoft’s Venture Fund), Carbon Direct Capital, Aramco Ventures, Bosch Ventures, Tectonic Ventures, Space Capital, and others. We have also been recognized on the EE Times Silicon 100 list for several consecutive years. Join us and shape the future of computing! Position Overview: We are seeking an experienced and adaptable FPGA Development Lead to join our foundational silicon team. In this capacity, you will serve as the architect of our hardware emulation and validation strategy, bridging RTL design and physical silicon. As an early team member at a rapidly evolving ASIC startup, your responsibilities will extend beyond coding to encompass the entire FPGA lifecycle, including selecting appropriate hardware platforms and executing complex system-level bring-up and post-silicon characterization. Location: Austin, TX. Full-time onsite position. Key Respon
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