LeadDSPEngineer

**Role Overview** We are seeking a highly motivated DSP Engineer to join our Automotive Ethernet PHY development team. In this role, you will work closely with the DSP Architect to implement and optimize DSP algorithms and architecture for next‑generation automotive-grade Ethernet PHY products. The role requires strong collaboration with System Architecture, DFT, Verification, Validation, IC Integration, and Backend (BE) teams. You will be responsible for DSP design implementation, RTL-level integration, performance validation, and supporting timing closure to ensure high‑quality, production-ready silicon. **Key Responsibilities** **DSP Architecture Implementation** * Implement DSP algorithms and architecture under guidance of the DSP Architect for Automotive Ethernet PHY (e.g., 100/1000BASE-T1 and multi‑gig PHYs). * Translate system‑level specifications into optimized DSP RTL design. * Participate in algorithm-to-architecture mapping, fixed‑point modeling, and performance tuning. **Design & RTL Development** * Develop synthesizable RTL for DSP datapaths, filters, equalizers, echo cancellation, FFE/DFE, AGC, timing recovery, etc. * Perform design optimization for area, timing, and power. * Create and maintain design documentation, micro‑architecture specs, and implementation notes. **Verification & Validation Support** * Work closely with the Verification team for test plan development, debug, and coverage closure. * Support Validation team during post‑silicon bring‑up, debug, and performance tuning. * Contribute to model correlation between MATLAB/C-model and RTL. **Cross‑Functional Collaboration** * Collaborate with System Architects to refine requirements and improve DSP behavior at system level. * Work with DFT Architects to ensure testability and seamless integration of DFT structures. * Partner with IC integrators to define top-level constraints and support SoC integration. * Support Backend (BE) teams for timing analysis, timing closure, and physical design i