Cadence
LeadDesignEngineer
Neural analysis suggests this role is
optimal for Lead candidates.
“Lead Design Engineer at Cadence. Skills: Verilog, RTL design, interface Protocols. Verilog coding. RTL design”
What They're Looking For.
Must Have
Verilog coding, RTL design, data path designs, RTL checks, synthesis flow, timing constraints, Verilog testbench, running simulations
Nice to Have
UCIe, PCIe, USB, MIPI(DPHY), HDMI/Display
What You'll Do.
Verilog coding, RTL design, data path designs, RTL checks, synthesis flow, timing constraints, Verilog testbench, running simulations
Full Job Description
## **At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.** 1\. Proficient in Verilog coding and RTL design, data path designs, 2\. Knowledge of RTL checks ex- LINT, SDC, CDC 3\. Familiar with synthesis flow and timing constraints 4\. Experience in writing Verilog testbench and running simulations. 5\. Familiar with any of the interface Protocols like UCIe, PCIe, USB, MIPI(DPHY), HDMI/Display ## **We’re doing work that matters. Help us solve what others can’t.**
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