LayoutEngineer,DDEG

**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The DRAM Design Engineering Group (DDEG) develops advanced memory solutions by tightly integrating design, layout, process integration, and CAD expertise. The team focuses on delivering high‑quality, manufacturable DRAM designs while continuously improving layout methods, automation, and documentation to support scalable and predictable execution. The Layout Engineer translates schematics and related geometry into manufacturable semiconductor layouts that meet design intent, process rules, and schedule commitments for advanced DRAM products. This role partners closely with Design, Process Integration, and CAD teams to floorplan, implement, verify, and deliver custom digital, memory, and analog layouts while contributing to methodology and automation improvements. **Responsibilities** * Develop multi‑dimensional layouts and detailed drawings for semiconductor devices from schematics and related geometry using CAD tools, from floorplan through final design. * Perform layout verification including DRC, LVS, dimensional checks, and quality reviews; verify completed drawings, artwork, and digitized plots. * Write and maintain specifications and documentation; prototype, codify, and share layout methods, automation, and SOPs to improve efficiency and quality. * Coordinate with global partners to deliver block‑level layouts on schedule, supporting tapeout and mask generation while maintaining quality standards. * Lead layout planning for assigned blocks or sub‑projects, provide technical guidance, mentor engineers, and ensure alignment to priorities and schedules. **Minimum Qualifications** * Bachelor’s degree or equivalent experience in Electrical Engineering, Computer