Astera Labs

Technology

HardwareDesignEngineering,Director-ActiveElectricCable/SmartCableModuleBusiness

$3500–5500k ~AI est. Taipei, Taipei, Taiwan
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for Director candidates.

The Brief

“Hardware Design Engineering, Director - Active Electric Cable / Smart Cable Module Business at Astera Labs. Skills: Hardware Design Engineering, Silicon Validation Platforms, Rack-Scale Product Design, OEM Customer Engagement. Establish Taiwan hardware engineering center. Lead OEM customer engagement in Asia”

Industry & Context.

Technology
Problems you'll solve

Root-cause analysis; Troubleshooting; Debug

Eligibility Requirements

Willingness to travel

What They're Looking For.

Must Have

5+ years hardware engineering leadership, Proven track record designing complex high-speed PCBs, Experience engaging with OEM customers, Experience with silicon evaluation platform design, Experience with rack-scale or chassis-class system design, Excellent communication skills in English, Based in Taiwan

Nice to Have

Master's or Ph. D. in Electrical Engineering, Direct experience designing evaluation platforms for retimer, re-driver, PCIe switch, CXL switch, or high-speed SerDes silicon, Experience developing rack-scale products for hyperscale cloud customers, Track record at a leading semiconductor company, Experience with 224G/lane interconnect technology, Deep familiarity with relevant standards, Experience with server/switch platform design, Background in establishing and scaling engineering operations in Taiwan, Mandarin Chinese fluency, Japanese or Korean language proficiency, Relationships with key OEM hardware engineering organizations in Asia

What You'll Do.

Establish Taiwan hardware engineering center

Lead OEM customer engagement in Asia

Own design and development of Silicon Validation Platforms

Own design and development of rack-scale products

Build and lead multidisciplinary hardware engineering team

Serve as senior hardware engineering leader in Asia

Partner with OEM customers

Maintain alignment with Santa Clara engineering organization

and develop engineering team

Define organizational structure and hiring roadmap

Establish lab infrastructure in Taiwan

Drive engineering culture

Serve as senior engineering leader in Asia

Provide expert-level design review support

Deliver hands-on technical engagement

Support customer hardware debug

Travel to customer sites across Asia

Develop and maintain production-quality reference designs

Create comprehensive hardware design guides

Develop design review checklists

Build deep technical relationships with OEM customers

Partner with Sales and Product Management

Participate in customer roadmap discussions

How You'll Work.

Team & Collaboration

Cross-functional teams; Internal teams; OEM customers; ODM partners; Contract manufacturers; Santa Clara headquarters; Sales teams; FAE teams; Product Management teams

Communication Scope

Customer presentations; Technical documentation; Customer engagement; Industry stakeholders

Process & Methodology

Roadmap planning

Full Job Description

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com. We are hiring a Director of Hardware Design Engineering — OEM, Silicon Validation Platforms & Rack-Scale Design to establish and lead Astera Labs' Taiwan hardware engineering center. This role serves as the primary hardware engineering hub for OEM customer engagement across Asia, while simultaneously owning the design and development of Silicon Validation Platforms (SVB/EVB) and rack-scale products (AI chassis, switch trays, CEM cards). This is a high-impact leadership role that combines three critical functions: OEM Design Enablement & Customer Support — Serving as the front-line hardware engineering partner for OEM customers in Asia (hyperscale cloud, server/switch OEMs, cable/module manufacturers) who are integrating Astera Labs silicon into their own products Silicon Validation Platform Design (SVB/EVB) — Designing and delivering the evaluation boards and system validation platforms that enable silicon bring-up, characterization, customer evaluation, and reference design seeding Rack-Scale Product Design — Designing AI chassis-class systems, switch trays, CEM cards, and system-level hardware that showcase Astera Labs' full connectivity portfolio You will build and lead a multidisciplinary hardware

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