CesiumAstro
FPGA
FPGAVerificationEngineerII
Neural analysis suggests this role is
optimal for Mid candidates.
“FPGA Verification Engineer II at CesiumAstro. Skills: FPGA Verification, UVMf testbenches, System Verilog, DPI-C integration. Contribute to evaluation and implementation of FPGA infrastructure. Contribute to development of CI/regression infrastructure”
Industry & Context.
U. S. citizen or resident
What They're Looking For.
Must Have
Bachelor of Science or Master of Science degree, Minimum 2 years industry experience, Competency with Linux
Nice to Have
Xilinx TLM models integration, QEMU-RP integration
What You'll Do.
Contribute to evaluation and implementation of FPGA infrastructure
Contribute to development of CI/regression infrastructure
Develop UVMf-based testbenches
Develop reusable custom VIP modules
Train and mentor engineers on UVMf
Implement DPI-C dataplane verification interfaces
Evaluate current processes regarding FPGA design
Work with vendors to define simulation model requirements
Maintain knowledge of industry best-practices
Evaluate and implement process improvements
How You'll Work.
Team & Collaboration
Engineering leadership team; Modeling and scientific staff; Cross-functional work environment
Full Job Description
## Description Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State. At CesiumAstro, we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to learn, develop, and engage across our organization. If you are looking for hands-on, interactive, and autonomous work, CesiumAstro is the place for you. We are actively seeking passionate, collaborative, energetic, and forward-thinking individuals to join our team. We are looking to add a Verification Engineer II to our team. If you enjoy working in a startup environment and are passionate about developing leading-edge phased arrays for satellites, spacecraft, and aerospace systems, we would like to hear from you. ## JOB DUTIES AND RESPONSIBILITIES Contribute to the evaluation and technical implementation of FPGA and digital design simulation, verification and emulation infrastructure. Contribute to the development, maintenance and phased deployment of continuous integration and regression testing infrastructure. Develop state-of-the-art UVMf-based top-level and module-level testbenches using block-to-top best practices for reusability, including both control and data plane stimulation using VIP & System Verilog DPI-C integration with existing MATLAB and Python numerical models. Lead the development of reusable custom VIP modules. Work closely with the engineering and senior leadership teams to train and mentor engineers at all experience levels on UVMf testbench usage and modern approaches to FPGA/digital design. Work with the modeling and scientific s
Applying for this FPGA Verification Engineer II role?
Most applicants get filtered before a human reads their resume. See if yours makes the cut.
How to Apply on Lever
- Lever uses a streamlined one-page form — apply in under 5 minutes.
- LinkedIn import works well; review parsed data before submitting.
- The cover letter field is optional but visible to reviewers — use it to differentiate.
- Referral codes from employees can significantly boost visibility of your application.
ANONYMOUS · UNFILTERED
What do employees actually say about CesiumAstro?
Real rants from real employees. Read before you apply.