Eridan
Telecommunications
FPGAEngineer
Neural analysis suggests this role is
optimal for Mid candidates.
“FPGA Engineer at Eridan. Skills: FPGA, Digital Signal Processing, Xilinx, Vivado. Design FPGA-based solutions. Develop FPGA-based solutions”
Industry & Context.
Analyze and troubleshoot performance bottlenecks
What They're Looking For.
Must Have
FPGA design and development, digital signal processing (DSP) concepts, compute architectures, Xilinx (AMD) tools and platforms, Vivado, Zynq, digital design principles, RTL design (VHDL/Verilog/SystemVerilog), simulation workflows, timing closure, synthesis, place-and-route processes, hardware debugging tools, board bring-up procedures, Siemens Questa simulation tools, Git, GitHub, Continuous Integration process, scripting, Linux environments
Nice to Have
Xilinx Versal platforms, telecommunications systems, Open RAN architecture, Open RAN related protocols, high-speed interfaces, data movement, Ethernet, PTP, SyncE JESD204
What You'll Do.
Design FPGA-based solutions
Develop FPGA-based solutions
Integrate FPGA-based solutions
Implement DSP algorithms
Optimize DSP algorithms
Collaborate with teams
Translate algorithmic requirements
Contribute to feature development
Enhance ORAN RU products
Participate in board bring-up
Participate in debugging
Participate in hardware validation
Analyze performance bottlenecks
Troubleshoot performance bottlenecks
How You'll Work.
Team & Collaboration
Collaborate with system and software teams; Collaborate with smart, passionate, and helpful co-workers
Full Job Description
About Eridan At Eridan we believe in the power of collaboration and communication to achieve our mission: connect the planet to empower a sustainable, shared future. That mission is possible with our patented transmitter which decreases the cost and power required to roll out 5G by 10x when deployed globally. Learn more about our mission here. About this Job We are seeking a Mid-Level FPGA Engineer to join our team and contribute to the development and evolution of our Open RAN Radio Unit (RU) platform. This role is ideal for someone who combines solid FPGA expertise with a strong understanding of digital signal processing and compute architectures, particularly in AI-driven systems. Responsibilities Design, develop, and integrate FPGA-based solutions for Open RAN Radio Units. Implement and optimize digital signal processing (DSP) algorithms for high-performance compute applications. Work with Xilinx (AMD) FPGA technologies, including Zynq-based platforms; Versal experience is a plus. Integrate and validate designs using Vivado, ensuring timing closure, proper routing, and backend implementation correctness. Collaborate with system and software teams to translate algorithmic requirements into efficient hardware implementations. Contribute to feature development and enhancements of existing ORAN RU products. Participate in board bring-up, debugging, and hardware validation processes. Analyze and troubleshoot performance bottlenecks across FPGA and system-level designs. Requirements 3–6 years of experience in FPGA design and development. Strong understanding of digital signal processing (DSP) concepts and their hardware implementation. Solid knowledge of compute architectures and interest in AI/ML acceleration on FPGA. Hands-on experience with Xilinx (AMD) tools and platforms, especially Vivado and Zynq. Experience with good digital design principles and practices for RTL design (VHDL/Verilog/SystemVerilog) and simulation workflows. Familiarity with timing closure, sy
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