CERN

Technology

FPGADeveloper(SY-RF-LIS-2026-164-GRAE)

$78–95k ~AI est. Geneva, Geneva, Switzerland FULL TIME
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for entry candidates.

The Brief

“FPGA Developer (SY-RF-LIS-2026-164-GRAE) at CERN. Skills: FPGA firmware, Python tools, Hardware validation. Develop FPGA firmware. Support integration”

Industry & Context.

Technology
Problems you'll solve

Fault detection; Protection systems

Eligibility Requirements

Work in Radiation Areas, Interventions in underground installations, Stand-by duty

What They're Looking For.

Must Have

FPGA design experience, Firmware development experience, VHDL experience, FPGA development environments, Verification tools, Debugging tools, Python programming experience, Test automation experience, Data analysis experience

Nice to Have

PCB design experience, Electronic circuit development experience

What You'll Do.

Develop FPGA firmware

Support commissioning

Develop FPGA firmware

How You'll Work.

Team & Collaboration

RF Group

Full Job Description

In this role, you will join the Accelerators Systems Department (SY) and work within the Radio Frequency (RF) Group, which is responsible for the operation, maintenance, and development of RF power amplifiers and accelerating cavities. As part of an ongoing consolidation of the RF systems of the CERN Proton Synchrotron (PS), the existing vacuum tube-based driver amplifiers are planned to be replaced by new solid-state RF amplifiers. You will contribute to the development of FPGA firmware for amplifier interlock systems and for rapid fault-detection and protection systems used across the RF systems of the PS Complex. The role also includes supporting the integration and testing of new systems and developing Python tools for automated measurements and hardware validation. The work will involve both laboratory testing and commissioning activities on RF equipment. Your responsibilities * Develop FPGA firmware for an interlock and protection system as part of a new solid-state RF amplifier design. * Support the integration, commissioning, and validation of the new interlock system within the PS RF infrastructure. * Develop Python-based tools for automated hardware testing, measurements, and data analysis. * Develop FPGA firmware for rapid fault-detection and protection systems for RF systems across the PS Complex. Your profile Required experience: * Initial experience in FPGA design and firmware development, preferably using VHDL. * Familiarity with FPGA development environments and verification/debugging tools. * Basic programming experience in Python or a similar language for test automation and data analysis. Desired experience: * Experience with PCB design and electronic circuit development. Skills * FPGA programming. * Knowledge of VHDL. * Knowledge of C/C++. * Knowledge of Python. * Spoken and written English, with a commitment to learn French. Eligibility criteria: * You are a national of a [CERN Member or Associate Member State](https://home.cern/about/member-sta

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