Analog Devices
Semiconductor
EngineerI,DesignVerificationEngineering
Neural analysis suggests this role is
optimal for Mid+ candidates.
“Engineer I, Design Verification Engineering at Analog Devices. Skills: Design Verification, SystemVerilog, UVM. Develop test benches. Perform design verification”
What You'll Achieve.
Meet project timelines; Meet quality standards
Industry & Context.
Solve verification challenges; Troubleshooting techniques
10% travel
What They're Looking For.
Must Have
3+ years relevant experience, Bachelor's or Master's degree
Nice to Have
SystemVerilog and UVM proficiency, Test bench development experience, Python, Perl, or TCL scripting, Verilog RTL understanding, EDA tools experience, Debugging experience, I2C, SPI, and UART knowledge
What You'll Do.
Perform design verification
Create verification plans
Perform black box testing
Debug verification issues
Collaborate with design teams
Participate in design reviews
Apply scripting skills
How You'll Work.
Team & Collaboration
Cross-functional teams
Full Job Description
**About Analog Devices** Analog Devices, Inc. (NASDAQ: _[ADI](http://finance.yahoo.com/q?s=ADI)_ ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at _[www.analog.com](https://www.analog.com/)_ and on _[LinkedIn](https://www.linkedin.com/company/analog-devices/posts/?feedView=all)_ and _[Twitter (X)](https://x.com/adi_news)_. **Design Verification Engineer** **About the Role** As a Design Verification Engineer at Analog Devices, you will develop test benches and perform design verification of new digital, analog, and mixed-signal products prior to tape-out. You'll create advanced environments that support comprehensive, metric-driven verification processes and ensure the accuracy and reliability of designs through code coverage analysis. Working with moderate supervision, you'll collaborate with cross-functional teams to meet project timelines and quality standards, applying your technical expertise to solve verification challenges. **Key Responsibilities** * Develop and execute comprehensive test benches for mixed-signal product verification using SystemVerilog and UVM methodologies * Create and maintain verification plans, focusing on functional and code coverage metrics to ensure design quality * Perform black box testing for complex designs to identify potential issues early in the verification cycle * Debug verification issues using advanced troubleshooting techniques and provide effective solutions * Collaborate with design teams to align verification strategies with project requirements * Create and main
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