Micron Technology

Technology

ENGINEER,DESIGN

€52–78k ~AI est. Avezzano, Italy FULL TIME Remote Friendly
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for Senior candidates.

The Brief

“ENGINEER, DESIGN at Micron Technology. Skills: NAND datapath, High-speed interfaces, CMOS circuit design. Design datapath circuits. Optimize datapath circuits”

Industry & Context.

Technology
Problems you'll solve

Problem-solving skills

What They're Looking For.

Must Have

M.S. or Ph.D. in Electrical Engineering, Knowledge of high-speed digital circuits, Knowledge of analog circuits, Knowledge of mixed-signal CMOS circuit design, Solid understanding of timing, Solid understanding of signal integrity, Solid understanding of noise, Solid understanding of variability, Solid understanding of deep-submicron device effects, Hands-on experience with simulation tools, Problem-solving skills, Communication skills

Nice to Have

Experience in NAND Flash memory, Experience in non-volatile memory technologies, Experience with high-speed interfaces, Familiarity with design automation, Familiarity with scripting, Familiarity with AI-assisted design approaches, Understanding of layout constraints, Understanding of physical design flows, Understanding of ESD considerations

What You'll Do.

Design datapath circuits

Optimize datapath circuits

Design interface circuits

Optimize interface circuits

Ensure timing closure

Ensure performance at block level

Ensure performance at sub-system level

Translate requirements into architectures

Translate requirements into implementations

Perform functional verification

Perform timing verification

Perform signal integrity verification

Perform corner analysis

Collaborate with cross-functional teams

Ensure floorplan integration

Ensure manufacturability

Align with product specifications

Develop automation solutions

Apply automation solutions

Support silicon validation

Support documentation

How You'll Work.

Team & Collaboration

Cross-functional teams; Dynamic environments

Communication Scope

Communication skills

Full Job Description

**Our vision is to transform how the world uses information to enrich life for** _**all**_**.** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. **Design/Senior Design Engineer – NAND datapath (NVE Engineering)** Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. **department Introduction** The Non-Volatile NAND Design Engineering group is responsible for the design and optimization of analog, digital and mixed-signal circuits enabling advanced NAND Flash memory products. Close collaboration with cross-functional teams ensures scalable, manufacturable, and reliable solutions across technology nodes. **Position Overview** As a Design Engineer in the NVE Design Engineering Datapath group at Micron Semiconductor Italia, you will contribute to the development of best‑in‑class NAND Flash memory products, focusing on datapath architectures and high‑speed interfaces. In this role, you will support the design, optimization, and validation of NAND datapath logic and DDR high‑speed interfaces, working at block and sub‑system level and contributing to full‑chip integration. You will apply your expertise in high‑speed CMOS circuits, timing, signal integrity, and power optimization, using both industry‑standard tools and Micron‑proprietary methodologies. **Responsibilities** Responsibilities include, but not limited to: • Design and optimize high-speed datapath and interface circuits, ensuring timing closure and performance at block and sub-system level. • Translate system and interface requirements into circuit architectures and transistor-level implementations, b

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