Etched

AI

DVIntern-Spring2027

San Jose, California, United States INTERNSHIP Remote Friendly
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for Entry candidates.

The Brief

“DV Intern - Spring 2027 at Etched. Skills: Design Verification, ASIC/SoC, SystemVerilog, UVM, Python. ensure the custom IPs powering our chips — including systolic arrays, DMA engines, and NoCs — are robust, high-performance, and silicon-ready. validate correctness and performance across the full hardware-software stack”

What You'll Achieve.

delivering over 10x higher performance and dramatically lower cost and latency than a B200

Industry & Context.

AI
Problems you'll solve

tackle complex verification challenges

Eligibility Requirements

12-week paid internship, Generous housing support for those relocating, Daily lunch and dinner in our office, Based at our office in San Jose, CA, Direct mentorship from industry leaders and world-class engineers

What They're Looking For.

Must Have

Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field, Familiarity with high-speed digital logic, Exposure to ASIC or SoC design concepts, Familiarity with SystemVerilog, UVM, or Python, Familiarity with verification work and writing test benches, Familiarity with physical design flows and tooling, Are able to learn quickly about transformers and other aspects of modern artificial intelligence

Nice to Have

Familiarity with transformer models and machine learning, UVM or formal verification experience, Ability to program with Python or another scripting language

What You'll Do.

ensure the custom IPs powering our chips — including systolic arrays

and NoCs — are robust

validate correctness and performance across the full hardware-software stack

How You'll Work.

Team & Collaboration

collaborate with architects, RTL designers, and SW/FWulation teams

Full Job Description

About Etched Etched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary As a Design Verification intern, you will ensure the custom IPs powering our chips — including systolic arrays, DMA engines, and NoCs — are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack. You may be a good fit if you have - Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field. - Familiarity with high-speed digital logic - Exposure to ASIC or SoC design concepts - Familiarity with SystemVerilog, UVM, or Python - Familiarity with verification work and writing test benches - Familiarity with physical design flows and tooling - Are able to learn quickly about transformers and other aspects of modern artificial intelligence Strong candidates may also have experience with - Familiarity with transformer models and machine learning - UVM or formal verification experience - Ability to program with Python or another scripting language We encourage you to apply even if you do not believe you meet every single qualification. Program details - 12-week paid internship - Generous housing support for those relocating - Daily lunch and dinner in our office - Based at our office in San Jose, CA

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