Butterfly Network
Technology
DistinguishedEngineer,ASIC(CONTRACT)
Neural analysis suggests this role is
optimal for Senior candidates.
“Distinguished Engineer, ASIC (CONTRACT) at Butterfly Network. Skills: Digital ASIC Design, RTL Implementation, Verification Signoff, System-on-a-Chip. Design digital signal processing logic. Implement digital signal processing logic”
Industry & Context.
Problem-solvers; Resolve functional issues
What They're Looking For.
Must Have
BS/MS/PhD in EE/CE/CS, 8-12+ years digital IC/ASIC/SoC design, Hands-on RTL ownership, Digital IC implementation understanding, Timing closure implications, Clock/reset domain architecture, Power-aware design, PPA tradeoffs, Own complex digital IC subsystems, RTL implementation, Verification signoff, Tapeout handoff, SystemVerilog/Verilog RTL skills, Silicon-proven digital architectures, Pipelined datapatths, Control logic, State machines, High-throughput streaming interfaces, Architect sustained high-throughput datapaths, Buffering, Arbitration, Backpressure, Bandwidth budgeting, SRAM/memory hierarchy design, Advanced technology nodes (28nm or smaller), Timing closure challenges, Integration of third-party IP, Collaborate with verification teams, Validate complex digital architectures, Resolve functional issues, Cross-functionally with analog teams, Cross-functionally with systems teams, Cross-functionally with packaging/board teams, Close chip-level requirements, Close integration details, Hardware-firmware interfaces, Register maps, Control/status paths, Data-plane contracts
Nice to Have
Experience implementing compute-intensive digital pipelines, DSP pipelines, Beamforming pipelines, AI pipelines, MAC-heavy/vector datapaths, Exposure to medical imaging systems, Exposure to ultrasound systems, Exposure to beamforming pipelines, Exposure to sensor data acquisition architectures, Designing programmable digital compute blocks, Integrating programmable digital compute blocks, AI accelerators, MPUs, EFPGA fabrics, Instruction/control interfaces, Memory hierarchy, Data movement, PPA tradeoffs
What You'll Do.
Design digital signal processing logic
Implement digital signal processing logic
Verify digital signal processing logic
Design high speed interface logic
Implement high speed interface logic
Verify high speed interface logic
Design system-on-a-chip logic
Implement system-on-a-chip logic
Verify system-on-a-chip logic
Own complex digital IC subsystems
Perform PPA tradeoffs
Achieve verification signoff
Perform tapeout handoff
Architect sustained high-throughput datapaths
Perform bandwidth budgeting
Design SRAM/memory hierarchy
Collaborate with verification teams
Validate complex digital architectures
Resolve functional issues
Work cross-functionally with analog teams
Work cross-functionally with systems teams
Work cross-functionally with packaging/board teams
Close chip-level requirements
Close integration details
Define hardware-firmware interfaces
Define control/status paths
Define data-plane contracts
Implement compute-intensive digital pipelines
Design AI accelerators
Integrate AI accelerators
Integrate eFPGA fabrics
How You'll Work.
Team & Collaboration
Cross-functional teams; Verification teams; Analog teams; Systems teams; Packaging/board teams
Full Job Description
Company Description Butterfly Network, Inc. (NYSE: BFLY) is driving a digital revolution in ultrasound imaging and sensing with its proprietary Ultrasound-on-Chip™ semiconductor technology and software solutions. Butterfly first proved its technology in the point-of-care ultrasound market – commercializing the world’s first single-probe, whole-body portable ultrasound device, which is now on its best-selling, third-generation: Butterfly iQ3™. The Company combines its advanced hardware with cloud software and AI, an enterprise workflow solution (Compass AI™) and other offerings to drive adoption of affordable, accessible ultrasound. Butterfly also enables third-party development of imaging AI apps through Butterfly Garden™, its software development kit and AI partnership initiative. In addition to its medical imaging products, Butterfly Embedded™ is the Company’s Ultrasound-on-Chip™ licensing and co-development program designed to enable a new wave of ultrasound-enabled technologies across non-competitive healthcare markets and beyond. Through Butterfly Embedded™, partners can build and scale novel ultrasound applications powered by Butterfly’s proprietary semiconductor chip and software platform. Butterfly’s innovations have been recognized by Prix Galien USA, Fierce 50, TIME’s Best Inventions and Fast Company’s World Changing Ideas, among other achievements. We’re a team of bold thinkers, problem-solvers, and innovators ready to shape the future of medical imaging. Let’s build something extraordinary together! Job Description The role of the Distinguished Engineer, Digital ASIC Designer offers the opportunity to work within the heart of the product development team to own the core of what will set Butterfly Network apart. This individual will design, implement, and verify digital signal processing, high speed interface, and system-on-a-chip logic for a suite of next-generation products. Qualifications Baseline skills/experiences/attributes: BS/MS/PhD in EE/CE/CS or
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