Silicon Labs
low-power wireless connectivity
DigitalVerificationEngineer
Neural analysis suggests this role is
optimal for Mid+ candidates.
“Digital Verification Engineer at Silicon Labs. Skills: Verilog, SystemVerilog, C programming, scripting languages, simulation, debugging, FPGA prototyping, UVM, ASIC verification methodologies, IP verification methodologies. Contribute to the verification of ASIC IP blocks used in wireless modem designs for IoT applications. Develop and maintain verification environments, testbenches, and simulations using Verilog and SystemVerilog”
Industry & Context.
analytical; problem-solving; identify root causes of failures; debug design or verification issues; debugging complex digital systems; analyzing simulation failures
What They're Looking For.
Must Have
Bachelor's, Master's, or PhD degree in Electrical Engineering, Computer Engineering, or a related field, Experience with Verilog and SystemVerilog for digital design and verification through professional setting, internships, coursework, research, or project work, Programming and scripting experience in C and scripting languages such as Python, Perl, or similar, Understanding of digital design fundamentals, computer architecture, VLSI concepts, or embedded systems, Hands-on experience with simulation, debugging, or FPGA prototyping through academic or internship projects, analytical, problem-solving, and communication skills
Nice to Have
Knowledge of UVM (Universal Verification Methodology), Exposure to ASIC or IP verification methodologies and tools, Experience debugging complex digital systems and analyzing simulation failures, Familiarity with digital communication systems or wireless modem architectures, Prior internship or project experience related to verification, RTL development, or semiconductor design
What You'll Do.
Contribute to the verification of ASIC IP blocks used in wireless modem designs for IoT applications
Develop and maintain verification environments
and simulations using Verilog and SystemVerilog
Support automated testing and verification flows through C programming and scripting
Analyze simulation results
identify root causes of failures
and debug design or verification issues in collaboration with cross-functional engineering teams
Participate in verification planning
and regression execution
Document verification results
communicate technical findings
and contribute ideas to improve methodologies and workflows
Collaborate with design
and software teams to ensure high-quality IP delivery
How You'll Work.
Team & Collaboration
collaboration with cross-functional engineering teams; Collaborate with design, architecture, and software teams
Communication Scope
communicate technical findings
Process & Methodology
verification planning
Full Job Description
Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at [www.silabs.com](https://www.silabs.com/). **Meet the Team** You’ll join the Modem Verification (IP Verification) team, which ensures the quality and reliability of Silicon Labs’ ASIC IP used in IoT applications. The team focuses on verifying complex digital designs for modem systems, applying advanced verification techniques to guarantee robust performance across real-world wireless scenarios. This critical work helps deliver low-power, high-performance solutions trusted across a wide range of connected devices. **Responsibilities** * Contribute to the verification of ASIC IP blocks used in wireless modem designs for IoT applications. * Develop and maintain verification environments, testbenches, and simulations using Verilog and SystemVerilog. * Support automated testing and verification flows through C programming and scripting. * Analyze simulation results, identify root causes of failures, and debug design or verification issues in collaboration with cross-functional engineering teams. * Participate in verification planning, test development, coverage analysis, and regression execution. * Document verification results, communicate technical findings, and contribute ideas to improve methodologies and workflows. * Collaborate with design, architecture, and software teams to ensure high-quality IP delivery. **Skills You Need** **Minimum Qualifications** * Bachelor’s, Master’s, or PhD degree in El
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