ADCI

Hardware Development, ASIC, alexa and amazon devices

DesignVerificationEngineer,SiliconandSystemsGroup

₹22–35L ~AI est. Bengaluru, Karnataka, India FULL TIME
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for Senior candidates.

The Brief

“Design Verification Engineer, Silicon and Systems Group at ADCI. Skills: Design Verification, SystemVerilog, UVM, Hardware design. Define verification methodology. Implement test plan”

What You'll Achieve.

Deliver functionally correct design blocks; Show progress towards tape-out

Industry & Context.

Hardware Development, ASIC, alexa and amazon devices
Problems you'll solve

Debugging; Resolve blocking issues

What They're Looking For.

Must Have

Bachelor's degree in Electrical Engineering, Experience using multiple verification platforms, Experience with test plan development, Experience identifying bugs, Experience verifying at multiple levels, Experience with industry standard tools, Experience in English-language communication, 7+ years semiconductor design verification, Experience defining verification methodologies, Experience writing directed/constrained-random tests

Nice to Have

Master's degree in Electrical or Communications Engineering, Experience in system-level debugging, Knowledge of SoC architecture, Experience with boot-up and bare metal flows, Programming skills in C, Scripting skills in Python and/or Perl, Experience with high performance industry standard IO interfaces, Experience with PCIE, Experience with formal verification, Experience with transaction level modeling, Knowledge of FPGA and emulation platforms

What You'll Do.

Define verification methodology

Participate in design verification

Participate in bring-up

Write relevant assertions

Interact with extended team

Architect functional blocks

Implement functional blocks

Communicate with team members

Work with team members

Deliver detailed test plans

Work with design engineers

Create verification environments

Enhance verification environments

Identify coverage measures

Write coverage measures

Debug tests with design engineers

Deliver design blocks

Close coverage measures

Identify verification holes

Show progress towards tape-out

Participate in test plan reviews

Participate in coverage reviews

Integrate 3rd party IPs

Integrate 3rd party VIPs

Integrate transactors

How You'll Work.

Team & Collaboration

Multi-disciplinary groups; Design engineers; Architects; HW developers; SW developers

Communication Scope

English-language communication

Full Job Description

As a Design Verification (DV) Engineer, you will be part of an advanced architecture team that is exploring new hardware designs to improve our devices. In this role, you will be responsible for defining the verification methodology and implementing the corresponding test plan for advanced functional blocks. You will participate in the design verification and bring-up of such blocks by writing relevant assertions, debugging code, test benches, test harnesses, and otherwise interacting with the extended team. You will work closely with multi-disciplinary groups including Product Design, Audio Technology, Computer Vision, Hardware Engineering, and Software Engineering, to architect and implement complex functional block that enable development of world-class hardware devices. In this role, you will: · Design world class hardware and software · Communicate and work with team members across multiple disciplines · Deliver detailed test plans for verification of complex digital design blocks by working with design engineers and architects · Create and enhance constrained-random verification environments using SystemVerilog and UVM · Identify and write all types of coverage measures for stimulus and corner-cases. · Debug tests with design engineers to deliver functionally correct design blocks. · Close coverage measures to identify verification holes and to show progress towards tape-out. · Participate in test plan and coverage reviews · Integrated 3rd party IPs/VIPs and transactors · Perform IP/SOC bringup in simulation, emulation and prototyping environments The ideal candidate should have experience with RTL development environments, fluency in modern hardware description languages and verification methodologies. They should have experience verifying complex IP blocks from scratch that have successfully been integrated in SOCs or other such silicon that have been productized in consumer devices. We are looking for a self-driven individual who can work with architects, H

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