DesignVerificationEngineer

# **Position:** Design Verification Engineer (Einfochips) # **Job Description:** **Experience: 6 + Years** **Location: Austin TX and San Jose CA** **Job Description:** **What candidate will Be Doing:** * At-least **6 + years of experience** in **System Verilog HVL and C ++/C** * At-least 6+ year of experience in **UVM.** * Experience in complete verification cycle which includes development of test plan, BFM/Driver/Monitor/Scoreboard component development and integration in test bench, stress/corner testing, failure debug, gate level simulations, assertions, and coverage closure. * Proficient in **SVTB/UVM, C ++ testbench** * Understand DSP is a plus * Subversion for Repository and Bugzilla is also a Plus * **Proficient in debug** and assertions coding * Verification closure with team **What We Are Looking For:** * At-least 6**+ years of experience** in **System Verilog HVL and C ++/C** * At-least 6+ year of experience in **UVM.** * **Make/Perl/Python / any script** * **Any protocol experiace is fine** * Ensure customer satisfaction. * Reporting to customer on daily or weekly progress effectively **What’s In It for You:** At Arrow, we recognize that financial rewards and great benefits are important aspects of an ideal job. That’s why we offer competitive financial compensation, including various compensation plans and a solid benefits package. * Medical, Dental, Vision Insurance * 401k, With Matching Contributions * Short-Term/Long-Term Disability Insurance * Health Savings Account (HSA)/Health Reimbursement Account (HRA) Options * Paid Time Off * Tuition Reimbursement * Growth Opportunities * And more! Work Arrangement Fully On-Site: Must be able to travel to an Arrow Client office location as requested by Arrow Client leadership. Location: **Austin, Texas (Preferred)/ Can be considered remote.** About eInfochips eInfochips, an Arrow company (Fortune #109), is a leading global provider of product engineering and semiconductor design services. A rich history of ove