DebugArchitect

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is building next-generation CPU and AI silicon. As a Debug Architect, you will define and scale debug and trace capabilities across our product lines, enabling both internal teams and external users to validate performance, diagnose issues, and optimize workloads. This role is hybrid, based out of Toronto, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced in hardware debug for CPU, SoC, or ASIC systems, including bring-up and post-silicon environments. Strong understanding of processor architecture and microarchitecture across RISC-V, x86, or ARM. Familiar with debug, profiling, and trace methodologies, including industry standards such as iJTAG. Comfortable working across hardware and software boundaries, including firmware and driver interaction. Proficient in HDL such as Verilog or VHDL and programming tools including Python and Git. What We Need Define and implement scalable debug architecture across multiple CPU and AI product lines. Design and validate hardware debug and trace features during development and verification. Prove debug capabilities during silicon development and ensure readiness for production use.