Annapurna Labs Ltd.

Technology

ChipDesignIntegrationLead

$650–950k ~AI est. Tel Aviv-Yafo, Tel Aviv, Israel FULL TIME
The Brief

“Chip Design Integration Lead at Annapurna Labs Ltd.. Skills: SoC Integration, Chip Design, RTL Design, Integration Lead. Take full ownership of SoC integration. Drive chip-level design implementation”

Industry & Context.

Technology
Problems you'll solve

Functional debugging; Design quality issue resolution; Troubleshooting

What They're Looking For.

Must Have

BSc in Computer/Electrical Engineering, 10+ years of hands-on experience in chip design, Micro-architecture and RTL design expertise, Verilog / SystemVerilog expertise, Scripting languages competency, Python, Perl, Bash, or Tcl competency, Communication skills, Collaboration skills, Leadership skills, Ability to own and drive complex integration units end-to-end

Nice to Have

Knowledge of protocols, AXI, CHI, DDR, Networking, PCIe knowledge, Network-on-Chip (NOC) architecture experience, Coherent and non-coherent fabric design knowledge, Comprehensive SoC development cycle expertise, Synthesis, STA, CDC, Lint expertise, Knowledge of Design Automation tools and techniques, Commitment to quality standards, Experience delivering to physical design teams, Experience delivering to emulation platforms, Experience delivering to firmware developers, Experience delivering to other stakeholders, Advanced degree in a related technical field

What You'll Do.

Take full ownership of SoC integration

Drive chip-level design implementation

Oversee creation of SoC-level IP blocks

Lead RTL integration activities

Address diverse functional and structural challenges

Contribute to creation and implementation of design flows

Support Verification and Emulation teams

Ensure chip meets quality and reliability standards

How You'll Work.

Team & Collaboration

Partnering with multiple teams; Collaborating with Architecture; Collaborating with RTL Design; Collaborating with DFT; Collaborating with Verification; Collaborating with System Verification; Collaborating with STA; Collaborating with Physical Design; Collaborating with firmware developers; Collaborating with other stakeholders

Communication Scope

Communication skills

Free ATS check

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