AssociateBackendEngineer

Embedded Processing Group (DFT): * Do DFT tasks MPU/MCU product, including Implementation and improving test coverage, verification, DFT SDC (timing constraint) design, Tester pattern making, Tester pattern debugging, ... * Work closely with the FE/BE teams to complete the chip design within the defined schedule. High-Performance Computing Group (Physical Design) * Physical Design: physical synthesis, place & route, timing closure, and timing/physical verification for IP, CPU, and Chip design. ## Qualifications * Undergraduate/Fresh graduate (for fresh engineer positions) majoring in Electronics, Telecommunications, Mechatronics, Automation, Computer Science, Computer Engineering, Information Technology, Mathematics, and Physics. * Good at English in writing and speaking skills, distinguished competence, consistent pursuit of excellence, professional behavior, and good relationships with others and society. * Have experience for one of related fields: HW FE/BE design (Logic architecture, Clock architecture, TPI), solid knowledge in using EDA tools (Synopsys, Cadence, Tessent, ...) are advantage * Have a strong passion in the technical field, especially in chip design. * Have logical thinking and explanation; be serious and mature in working attitude * Long-term working commitment ## Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘To Make Our Lives Easier.’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a