Annapurna Labs

Corporate Operations, ASIC, no business category

ASICII

$136–184k Austin, Texas, United States FULL TIME
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for Mid candidates.

The Brief

“ASIC II at Annapurna Labs. Skills: Signal integrity, Power integrity, ASIC design, Machine learning ASICs. Design SI/PI systems. Validate SI/PI systems”

What You'll Achieve.

Meet stringent performance requirements

Industry & Context.

Corporate Operations, ASIC, no business category
Problems you'll solve

Resolving complex SI issues; Debugging prototypes; Tackle novel challenges

What They're Looking For.

Must Have

Bachelor's degree or foreign equivalent, 2 years of experience, 1 year experience using time domain and frequency domain tools, 1 year experience with PCB, Package, interposers, and Silicon, 1 year experience in Transmission line theory and Electromagnetics

Nice to Have

Please see job description and the position requirements above

What You'll Do.

Validate SI/PI systems

Apply transmission line theory

Apply electromagnetics

Develop high-speed interfaces

Ensure system-level integrity

Validate simulation results

Correlate simulation results

Propose innovative solutions

Document simulation outcomes

Document measurement data

Document design trade-offs

Present recommendations

How You'll Work.

Team & Collaboration

Cross-functionally with silicon teams; Cross-functionally with packaging teams; Cross-functionally with board design teams; Cross-functionally with validation teams

Communication Scope

Present to stakeholders

Full Job Description

MULTIPLE POSITIONS AVAILABLE Employer: ANNAPURNA LABS (U.S.) INC. Offered Position: ASIC II Job Location: Austin, Texas Job Number: AMZ9679283 Position Responsibilities: Design and validate signal and power integrity (SI/PI) systems for next generation machine learning ASICs and customized hardware platforms optimized for AWS datacenter environments. Perform both time-domain and frequency-domain simulations using tools such as HSPICE, Cadence Sigrity, HFSS, and Keysight ADS, including 3D/2.5D EMIR analysis. Apply transmission line theory and electromagnetics to develop high-speed interfaces like SerDes and PCIe, resolving complex SI issues across digital systems. Collaborate cross-functionally with silicon, packaging, board design, and validation teams to ensure system-level integrity across PCB, interposers, and advanced SoC power delivery architectures using die-level capacitors (DTC, IPD). Use high-speed lab equipment to validate and correlate simulation results, while debugging prototypes to meet stringent performance requirements. Tackle novel challenges in interconnects and power delivery for large-scale compute environments by proposing innovative, high-impact solutions. Document simulation outcomes, measurement data, and design trade-offs, presenting clear recommendations to both technical and non-technical stakeholders while fostering a culture of continuous learning and engineering excellence Position Requirements: Bachelor's degree or foreign equivalent degree in Electrical or Computer Engineering or related field and two years of experience in the job offered or related occupation. Must have one year of experience in the following skills: (1) using time domain and frequency domain tools: Hspice, Sigrity, HFSS, or Microwave Studio; (2) with PCB, Package, interposers (COWOS) and Silicon Technologies; (3) in Transmission line theory and Electromagnetics and its application in SerDes, Single-ended signal and parallel bus interfaces. Amazon.com is an Equal Op

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