NVIDIA
Artificial Intelligence
ASICFloorplanDesignEngineer
Neural analysis suggests this role is
optimal for Mid candidates.
“ASIC Floorplan Design Engineer at NVIDIA. Skills: ASIC Floorplan Design, VLSI, Computer Architecture, Verilog, System Verilog, Python, Perl, C/C++. develop and to craft and optimize floorplans during early chip development. Drive the area review process”
What You'll Achieve.
craft and influence the design and development of the next generation GPU and SoC; optimize chip area and speed of execution; crafting the fastest and most power efficient chips in their class
Industry & Context.
Solve timing and routing congestion issues
What They're Looking For.
Must Have
Masters Degree in Electrical Engineering, Computer Science, or Computer Engineering or equivalent work experience, At least 3+ years of relevant work experience, A deep hardware engineering background with a concentration in VLSI and/or Computer Architecture, Experience in Verilog, System Verilog or similar HVL, Experience with CAD and physical design methodologies (flow and tool development), chip floorplan, power/clock distribution, packaging, P&R and timing closure, Python, Perl and C/C++ programming language experience
Nice to Have
Experience in driving development of large scale ASIC floorplan is a huge plus
What You'll Do.
develop and to craft and optimize floorplans during early chip development
Drive the area review process
collaborate with the ASIC design team to identify area
interconnect and floorplan improvement opportunities
Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and physical implementation decisions
build tools and improve existing infrastructure to optimize chip area and speed of execution
How You'll Work.
Team & Collaboration
Working with architects, design leads, physical design leads and package leads; collaborate with the ASIC design team; work as a great teammate
Communication Scope
communication and interpersonal skills
Full Job Description
We are now looking for an ASIC Floorplan Design Engineer. NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world’s leading SoC's and GPU's. This position offers you a unique opportunity to craft and to influence the design and development of the next generation GPU and SoC, allowing you to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. **What you will be doing:** * Working with architects, design leads, physical design leads and package leads, you will develop and to craft and optimize floorplans during early chip development. * Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities. * Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and physical implementation decisions. * You will build tools and improve existing infrastructure to optimize chip area and speed of execution. **What we need to see:** * Masters Degree in Electrical Engineering, Computer Science, or Computer Engineering or equivalent work experience. * At least 3+ years of relevant work experience. * A deep hardware engineering background with a concentration in VLSI and/or Computer Architecture. * Experience in Verilog, System Verilog or similar HVL. * Experience with CAD and physical design methodologies (flow and tool development), chip floorplan, power/clock distribution, packaging, P&R and timing closure. * Strong communication and interpersonal skills and ability & desire to work as a great teammate should be displayed in your interview. * Python, Perl and C/C++ programming language experience. **Wa
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