Annapurna Labs

Technology

ASICDesignEngineerII

$136–184k Austin, Texas, United States FULL TIME
The Brief

“ASIC Design Engineer II at Annapurna Labs. Skills: ASIC design, RTL design, VLSI engineering, Machine Learning acceleration. Integrate multiple subsystems into top level SOC. Ensure correct clock/reset/functional/DFT signal routing”

Industry & Context.

Technology
Problems you'll solve

Problem solving skills; Debug skills; Analyze RTL test failures

What They're Looking For.

Must Have

Bachelor's degree in Electrical Engineering, 5+ years in RTL design, 5+ years in VLSI engineering, 5+ years with code quality tools

Nice to Have

Master's degree in electrical engineering, Experience with Microarchitecture, Experience with SystemVerilog RTL, Experience with Assertions, Experience with SDC constraints, Experience with automation scripting languages, Familiarity with data path design, Familiarity with interconnects, Familiarity with AXI protocol, Good analytical skills, Good problem solving skills, Good communication skills

What You'll Do.

Integrate multiple subsystems into top level SOC

Ensure correct clock/reset/functional/DFT signal routing

Implement and deliver high performance RTL

Deliver area and power efficient RTL

Achieve design targets and specifications

Analyze design trade-offs

Analyze microarchitecture trade-offs

Analyze architecture trade-offs

Make trade-offs based on features

Make trade-offs based on power

Make trade-offs based on performance

Make trade-offs based on area

Develop micro-architecture

Implement SystemVerilog RTL

Deliver synthesis/timing clean design

Deliver design with constraints

Perform lint quality checks

Perform clock domain crossing quality checks

Work with other designers

Work with verification teams

Work with pre-silicon validation teams

Work with post-silicon validation teams

Work with synthesis teams

Work with timing teams

Work with back-end teams

How You'll Work.

Team & Collaboration

Work with architects; Work with designers; Work with verification teams; Work with validation teams; Work with synthesis teams; Work with timing teams; Work with back-end teams

Communication Scope

Communication skills

Free ATS check

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