NVIDIA

Technology

ASICClocksDesignEngineer-NewCollegeGrad2026

$100–190k Santa Clara, California, United States FULL TIME
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for Entry candidates.

The Brief

“ASIC Clocks Design Engineer - New College Grad 2026 at NVIDIA. Skills: ASIC Clocks Design, RTL Design, PPA Optimization. Architect clock domain. Design GPU clocks”

Industry & Context.

Technology
Problems you'll solve

Develop solutions for supporting high speed Clocking

What They're Looking For.

Must Have

Bachelor's degree or higher in Electrical Engineering, Understanding of logic optimization techniques, Understanding of PPA trade-offs, Proven ability to collaborate with multiple teams, Experience in RTL design, Experience in verification, Experience in logic synthesis, Coding skills in Python, Coding skills in other scripting languages

Nice to Have

Understanding of sub-micron silicon issues, Implementing on-chip clocking networks

What You'll Do.

Architect clock domain

Implement new Clocking topologies

Evaluate Clocking concerns

Develop solutions for high speed Clocking

Deliver clock RTL information

Get involved in end-to-end cycle of ASIC execution

Design implementation

How You'll Work.

Team & Collaboration

Collaborate with front design team; Interact with floor-planning team; Interact with back end team; Explain programming model to SW team; Work with silicon solution team; Engage with multiple teams; Collaborate with Physical design team; Collaborate with timing team; Collaborate with SOC verification team; Collaborate with timing teams; Collaborate with DFT teams

Full Job Description

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can take on, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice to join us today. We are looking for an ASIC Clocks Design Engineer to join the team. Our team crafts all aspects of GPU and CPU clocking. The team collaborates with the front design team to understand the clocking requirements for the chip. The clocks team interacts with the floor-planning and back end team to help craft the physical floorplan of the chip. The team explains the programming model to the SW team to come up with an efficient clock programming sequence. The team works with the silicon solution team to triage silicon or programming bugs in the lab. **What you 'll be doing:** * As a Clocks team member, you will be architecting the clock domain to satisfy functional, physical and testing design requirements. * Engage with multiple teams and design the GPU or CPU clocks to satisfy all the architectural/design/physical constraints. * Improve Power, Performance, and Area (PPA) of innovative NVIDIA chips by evaluating trade-offs across DFx, Physical Implementation, Power Optimization and Ease of timing closure to innovate and implement new Clocking topologies in RTL. * Collaborate with Physical design and timing team to evaluate Clocking concerns and develop solutions for supporting high speed Clocking. * Together with other team members, we deliver clock RTL information to GPU, CPU and SOC verification team, timing and DFT teams. * Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design impleme

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