NVIDIA
Technology
ASICClocksDesignEngineerNewCollegeGrad2026
“ASIC Clocks Design Engineer - New College Grad 2026 at NVIDIA. Skills: ASIC Clocks Design, RTL Design, PPA Optimization. Architect clock domain. Design GPU clocks”
Industry & Context.
Develop solutions for supporting high speed Clocking
What They're Looking For.
Must Have
Bachelor's degree or higher in Electrical Engineering, Understanding of logic optimization techniques, Understanding of PPA trade-offs, Proven ability to collaborate with multiple teams, Experience in RTL design, Experience in verification, Experience in logic synthesis, Coding skills in Python, Coding skills in other scripting languages
Nice to Have
Understanding of sub-micron silicon issues, Implementing on-chip clocking networks
What You'll Do.
Architect clock domain
Implement new Clocking topologies
Evaluate Clocking concerns
Develop solutions for high speed Clocking
Deliver clock RTL information
Get involved in end-to-end cycle of ASIC execution
Design implementation
How You'll Work.
Team & Collaboration
Collaborate with front design team; Interact with floor-planning team; Interact with back end team; Explain programming model to SW team; Work with silicon solution team; Engage with multiple teams; Collaborate with Physical design team; Collaborate with timing team; Collaborate with SOC verification team; Collaborate with timing teams; Collaborate with DFT teams
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