Cadence Design Systems Inc.
Technology
ApplicationEngineer-PhysicalVerification(Sign-off)
Neural analysis suggests this role is
optimal for Mid candidates.
“Application Engineer - Physical Verification (Sign-off) at Cadence Design Systems Inc.. Skills: Physical Verification, Analog IC Design, EDA Tools. Support customers using EDA tools. Deliver technical training”
Industry & Context.
Excellent problem-solving skills
What They're Looking For.
Must Have
Complete BSc required, 3+ years’ experience of analog/mixed-signal IC layout/design or CAD support, Experience of physical verification and parasitic extraction, Experience of UNIX environments, Excellent problem-solving skills, Ability to work independently and productively with high quality output in a fast paced and dynamic environment
Nice to Have
MSc/MEng preferred in Electronic Engineering / Physics, ideally within Cadence tooling and associated design methodologies, Preferred knowledge of SKILL, Python or other programming languages, A team player who is passionate about technology but also understands business requirements, verbal and written communication skills, Interest and ability to learn new technologies
What You'll Do.
Support customers using EDA tools
Deliver technical training
Deliver methodology services
Deliver technical presentations
Deliver demonstrations
Drive technical campaigns
Drive product evaluations
Enable customer deployment
Debug technical software
Understand customer needs
Communicate customer requirements
How You'll Work.
Team & Collaboration
Work with customers; Work with account teams; Work with product development teams; Communicate customer requirements and feedback to Cadence product groups and marketing
Communication Scope
Verbal communication skills; Written communication skills
Full Job Description
## **At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.** [ Cadence Design Systems Inc.](https://www.cadence.com/) is looking for a motivated **Application Engineer I - Physical Verification (Sign-off)** to work with us in Belo Horizonte, Brazil. At Cadence, we hire and develop leaders and innovators who want to impact the world of technology. Cadence has been nominated as a Great Place to Work globally and in Brazil and is also a [Fortune 100 Best Companies to Work For](https://community.cadence.com/cadence_blogs_8/b/corporate-news/posts/fortune-and-great-place-to-work-name-cadence-to-2025-world-s-best-workplaces-list). As an application engineer, you will be part of **Custom Product Group** (**CPG**) focus on Analog flow, Design and Simulation in Belo Horizonte, Brazil. To understand more about what we do, you can visit [our website](https://www.cadence.com/en_US/home/tools/custom-ic-analog-rf-design.html). Working at Cadence is very dynamic, fast-paced, and integrated with other teams all around the world. The successful engineer will work with customers, account teams and product development teams supporting Cadence’s Custom IC and Signoff software products including: * Virtuoso Schematic Editor * Virtuoso Layout Suite (XL/EXL/MXL) * Virtuoso Analog Design Environment * Virtuoso Studio Platform (Design Framework) * Pegasus/PVS * Quantus _**Job Description:** _ * Supporting our customers in their use of our EDA tools for custom and mixed signal IC design with a focus on analog layout automation technologies. * Delivering technical training and methodology services in these areas. * Delivering technical presentations, demonstrations, and evaluations, including development of customized presentations and demos as required. * Driving technical campaigns and product evaluations to resolve customer design challenges. * Enabling customers’ deployment of new Cadence solutions into production design flows. This i
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