Astera Labs
AI infrastructure
Analog/MixedSignalLayoutEngineer
“Analog / Mixed-Signal Layout Engineer at Astera Labs. Skills: Analog / Mixed-Signal Layout design, VLSI, Computer Architecture, RTL design, verification methodologies. design and/or verification of blocks using leading edge methodology and tools”
Industry & Context.
What They're Looking For.
Must Have
Pursuing BS or MS in EE/CS or related fields, Hardware engineering background with an emphasis in VLSI or Computer Architecture, Exposure to Digital design or verification, VLSI design and circuits, Computer Architecture, Hands-on and knowledge of RTL design languages and tools including Verilog, System Verilog, Familiarity with verification methodologies like UVM, functional coverage, assertions, Familiarity with any of the scripting languages Python, Perl etc and hands-on experience in C/C++
Nice to Have
Real-world design and/or verification in Verilog/System Verilog, Knowledge of high-speed interfaces like PCIe, DDR, HBM, Serdes, Familiarity with Synopsys EDA tools, Exposure to high-speed interfaces PCIE, DDR, HBM, Serdes technologies
What You'll Do.
design and/or verification of blocks using leading edge methodology and tools
Applying for this Analog / Mixed-Signal Layout Engineer role?
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