Sandisk
Data Storage
AI/MLASICArchitect
“AI/ML ASIC Architect at Sandisk. Skills: AI/ML ASIC Architecture, System Architectures, Frontend Interfaces, AI Storage Solutions. Drive AI/ML ASIC architecture. Integrate AI Storage with accelerators”
What You'll Achieve.
Deliver innovative and highly competitive adaptive accelerators solutions; Meet PPA and schedule targets; Improve AI/ML ASIC Architecture performance; Match or exceed nextgen HBM bandwidth
Industry & Context.
Cope with complex challenges; Analyze PPA tradeoffs; Analyze ASIC and competitive datacenter solutions
What They're Looking For.
Must Have
Bachelors or Masters or PhD in Computer/Electrical Engineering, 15+ years of hands-on Architecture experience authoring specifications, technical background architecting ASIC, SoC, or I/O subsystems involving PCIe/UCIe/CXL and DMA engines, Knowledge of I/O Subsystem and DMA interactions with internal embedded processor-subsystems (x86, RISC-V or ARM) and external host CPU, Good understanding of computer/graphics architecture, ML, LLM, Architecting an GPU/TPU/xPU Accelerator systems with optimized high bandwidth memory hierarchy and frontend architecture for multi-trillion parameter LLM training/inference including Dense, Mixture of Experts (MoE) with multiple modalities (text, vision, speech), KV cache optimization, Flash Attention, Mixture of Experts, Deep experience optimizing large-scale ML systems, GPU architectures, Proficiency in principles and methods of microarchitecture, software, and hardware relevant to performance engineering, Knowledge of ARM Processors and AXI Interconnects
Nice to Have
Familiarity and background in UCIe, CXL, NVLink, or UAL microarchitecture and protocols, Familiarity with High-speed networking: InfiniBand, RDMA, NVLink, Expert knowledge of transformer architectures, attention mechanisms, and model parallelism techniques, Multi-disciplinary experience, including familiarity with Firmware and ASIC design, Expertise in CUDA programming, GPU memory hierarchies, hardware-specific optimizations, Proven track record architecting distributed training systems handling large scale systems, Previous experience with NVMe storage systems, protocols, and NAND flash
What You'll Do.
Drive AI/ML ASIC architecture
Integrate AI Storage with accelerators
Focus on I/O subsystems
Author architecture specifications
Define I/O subsystem architectures
Define PCIe DMA architectures
Create flexible I/O subsystem architectures
Scope SoC requirements
Analyze PPA tradeoffs
Define architectural requirements
Define SoC subsystem interactions
Define DMA hardware/software/firmware interactions
Guide pre-silicon design/verification
Assist post-silicon validation
Improve AI/ML ASIC Architecture performance
Analyze ASIC and competitive datacenter solutions
Characterize AI solutions
Architect memory-efficient systems
Collaborate with stakeholders/ML researchers
Iterate at rapid pace
How You'll Work.
Team & Collaboration
Collaborate with design and product planning; Work with other architects in the team; Work with RTL/DV/Simulation/FW teams; Work with customers; Work with cross-functional teams; Collaborate with internal and external stakeholders/ML researchers
Communication Scope
Excellent communication skills; Clear and concise language
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